Searched refs:CONTROL (Results 1 - 25 of 66) sorted by relevance

123

/linux-master/drivers/clocksource/
H A Dtimer-digicolor.c48 #define CONTROL(t) ((t)*8) macro
72 writeb(CONTROL_DISABLE, dt->base + CONTROL(dt->timer_id));
78 writeb(CONTROL_ENABLE | mode, dt->base + CONTROL(dt->timer_id));
180 writeb(CONTROL_DISABLE, dc_timer_dev.base + CONTROL(TIMER_B));
182 writeb(CONTROL_ENABLE, dc_timer_dev.base + CONTROL(TIMER_B));
/linux-master/net/devlink/
H A Dtrap.c987 DEVLINK_TRAP(STP, CONTROL),
988 DEVLINK_TRAP(LACP, CONTROL),
989 DEVLINK_TRAP(LLDP, CONTROL),
990 DEVLINK_TRAP(IGMP_QUERY, CONTROL),
991 DEVLINK_TRAP(IGMP_V1_REPORT, CONTROL),
992 DEVLINK_TRAP(IGMP_V2_REPORT, CONTROL),
993 DEVLINK_TRAP(IGMP_V3_REPORT, CONTROL),
994 DEVLINK_TRAP(IGMP_V2_LEAVE, CONTROL),
995 DEVLINK_TRAP(MLD_QUERY, CONTROL),
996 DEVLINK_TRAP(MLD_V1_REPORT, CONTROL),
[all...]
/linux-master/drivers/parport/
H A Dparport_gsc.c83 s->u.pc.ctr = parport_readb (CONTROL (p));
88 parport_writeb (s->u.pc.ctr, CONTROL (p));
147 parport_writeb (w, CONTROL (pb));
154 r = parport_readb (CONTROL (pb));
157 parport_writeb (w, CONTROL (pb));
158 r = parport_readb (CONTROL (pb));
159 parport_writeb (0xc, CONTROL (pb));
H A Dparport_gsc.h47 #define CONTROL(p) ((p)->base + 0x2) macro
101 parport_writeb (ctr, CONTROL (p));
H A Dparport_pc.c259 outb(c, CONTROL(p));
1430 outb(w, CONTROL(pb));
1437 r = inb(CONTROL(pb));
1440 outb(w, CONTROL(pb));
1441 r = inb(CONTROL(pb));
1442 outb(0xc, CONTROL(pb));
1502 outb(r, CONTROL(pb));
1504 outb(r ^ 0x2, CONTROL(pb)); /* Toggle bit 1 */
1506 r = inb(CONTROL(pb));
1521 outb(0xc, CONTROL(p
[all...]
/linux-master/include/linux/
H A Dparport_pc.h15 #define CONTROL(p) ((p)->base + 0x2) macro
89 unsigned char dcr = inb (CONTROL (p));
103 dcr = i ? priv->ctr : inb (CONTROL (p));
144 outb (ctr, CONTROL (p));
/linux-master/drivers/scsi/
H A Daha1542.h29 #define CONTROL(base) STATUS(base) macro
H A Daha1542.c78 outb(IRST, CONTROL(base));
220 outb(SRST | IRST /*|SCRST */ , CONTROL(sh->io_port));
254 outb(IRST, CONTROL(sh->io_port));
937 outb(reset_cmd, CONTROL(cmd->device->host->io_port));
/linux-master/drivers/watchdog/
H A Dmachzwd.c52 #define CONTROL 0x10 /* 16 */ macro
151 /* CONTROL register functions */
155 return zf_readw(CONTROL);
160 zf_writew(CONTROL, new);
/linux-master/drivers/gpu/drm/amd/display/dc/optc/dcn31/
H A Ddcn31_optc.c106 REG_UPDATE(CONTROL,
132 REG_UPDATE(CONTROL,
152 REG_UPDATE(CONTROL,
/linux-master/sound/pci/
H A Dens1370.c679 inl(ES_REG(ensoniq, CONTROL));
838 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
873 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
892 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
914 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
932 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
954 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
970 outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
984 if (inl(ES_REG(ensoniq, CONTROL)) & ES_DAC1_EN) {
1001 if (inl(ES_REG(ensoniq, CONTROL))
[all...]
/linux-master/drivers/net/ethernet/smsc/
H A Dsmc9194.h104 #define CONTROL 12 macro
H A Dsmc91c92_cs.c191 #define CONTROL 12 macro
553 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
557 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
775 outw(0, ioaddr + CONTROL);
1105 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1336 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1338 ioaddr + CONTROL);
1664 ioaddr + CONTROL);
H A Dsmc9194.c338 outw( inw( ioaddr + CONTROL ) | CTL_AUTO_RELEASE , ioaddr + CONTROL ); local
398 outw( inw( ioaddr + CONTROL ), CTL_POWERDOWN, ioaddr + CONTROL );
/linux-master/drivers/gpu/drm/amd/display/dc/optc/dcn314/
H A Ddcn314_optc.c115 REG_UPDATE(CONTROL,
142 REG_UPDATE(CONTROL,
/linux-master/drivers/gpu/drm/amd/display/dc/optc/dcn35/
H A Ddcn35_optc.c120 REG_UPDATE(CONTROL,
157 REG_UPDATE(CONTROL,
/linux-master/drivers/gpu/drm/amd/display/dc/optc/dcn32/
H A Ddcn32_optc.c155 REG_UPDATE(CONTROL,
192 REG_UPDATE(CONTROL,
/linux-master/drivers/bluetooth/
H A Dbt3c_cs.c113 #define CONTROL 4 macro
349 iir = inb(iobase + CONTROL);
370 outb(iir, iobase + CONTROL);
524 outb(inb(iobase + CONTROL) | 0x40, iobase + CONTROL); local
/linux-master/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_opp.h78 SRI(CONTROL, FMT_MEMORY, id)
82 SRI(CONTROL, FMT_MEMORY, id)
295 uint32_t CONTROL; member in struct:dce_opp_registers
H A Ddce_opp.c587 REG_GET(CONTROL,
594 REG_UPDATE(CONTROL,
/linux-master/drivers/media/usb/uvc/
H A Duvc_ctrl.c953 uvc_dbg(chain->dev, CONTROL, "Control 0x%08x not found\n",
2106 uvc_dbg(dev, CONTROL,
2119 uvc_dbg(dev, CONTROL,
2127 uvc_dbg(dev, CONTROL,
2157 uvc_dbg(dev, CONTROL,
2188 uvc_dbg(chain->dev, CONTROL, "Extension unit %u not found\n",
2204 uvc_dbg(chain->dev, CONTROL, "Control %pUl/%u not found\n",
2353 uvc_dbg(dev, CONTROL, "Added control %pUl/%u to device %s entity %u\n",
2423 uvc_dbg(chain->dev, CONTROL, "Adding mapping '%s' to control %pUl/%u\n",
2448 uvc_dbg(dev, CONTROL,
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/optc/dcn10/
H A Ddcn10_optc.c273 REG_UPDATE(CONTROL,
378 REG_UPDATE_2(CONTROL,
382 REG_UPDATE(CONTROL, VTG0_VCOUNT_INIT, v_init);
533 REG_UPDATE(CONTROL,
561 REG_UPDATE(CONTROL,
/linux-master/drivers/net/ethernet/marvell/prestera/
H A Dprestera_devlink.c135 DEVLINK_TRAP_GENERIC(CONTROL, _action, _id, \
140 DEVLINK_TRAP_DRIVER(CONTROL, TRAP, DEVLINK_PRESTERA_TRAP_ID_##_id, \
/linux-master/drivers/hwmon/
H A Dadt7475.c29 #define CONTROL 3 macro
798 /* Get a fresh value for CONTROL */
799 data->pwm[CONTROL][sattr->index] =
806 if (((data->pwm[CONTROL][sattr->index] >> 5) & 7) != 7) {
917 data->pwm[CONTROL][index] &= ~0xE0;
918 data->pwm[CONTROL][index] |= (val & 7) << 5;
921 data->pwm[CONTROL][index]);
1881 data->pwm[CONTROL][index] = adt7475_read(PWM_CONFIG_REG(index));
1887 v = (data->pwm[CONTROL][index] >> 5) & 7;
1900 data->pwm[CONTROL][inde
[all...]
/linux-master/drivers/hid/
H A Dhid-roccat-lua.c95 LUA_BIN_ATTRIBUTE_RW(control, CONTROL)

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