Searched refs:rtc (Results 1 - 25 of 82) sorted by relevance

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/u-boot/post/drivers/
H A DMakefile6 obj-y += flash.o i2c.o memory.o rtc.o
/u-boot/include/reboot-mode/
H A Dreboot-mode-rtc.h10 struct udevice *rtc; member in struct:reboot_mode_rtc_platdata
/u-boot/drivers/rtc/
H A Dmcfrtc.c10 #include <rtc.h>
12 #include <asm/rtc.h>
21 volatile rtc_t *rtc = (rtc_t *) (CONFIG_SYS_MCFRTC_BASE); local
26 rtc_days = rtc->days;
27 rtc_hrs = rtc->hourmin >> 8;
28 rtc_mins = RTC_HOURMIN_MINUTES(rtc->hourmin);
32 tim = (tim * 60) + rtc->seconds;
50 volatile rtc_t *rtc = (rtc_t *) (CONFIG_SYS_MCFRTC_BASE); local
83 rtc->days = days;
84 rtc
92 volatile rtc_t *rtc = (rtc_t *) (CONFIG_SYS_MCFRTC_BASE); local
[all...]
H A Dmc13xxx-rtc.c7 #include <rtc.h>
12 int rtc_get(struct rtc_time *rtc) argument
38 rtc_to_tm(tim, rtc);
40 rtc->tm_yday = 0;
41 rtc->tm_isdst = 0;
46 int rtc_set(struct rtc_time *rtc) argument
53 time = rtc_mktime(rtc);
H A Darmada38x.c13 #include <rtc.h>
41 static void update_38x_mbus_timing_params(struct armada38x_rtc *rtc) argument
45 reg = readl(rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
50 writel(reg, rtc->regs_soc + RTC_38X_BRIDGE_TIMING_CTL);
53 static void armada38x_rtc_write(u32 val, struct armada38x_rtc *rtc, u8 reg) argument
55 writel(0, rtc->regs + RTC_STATUS);
56 writel(0, rtc->regs + RTC_STATUS);
57 writel(val, rtc->regs + reg);
61 static u32 armada38x_rtc_read(struct armada38x_rtc *rtc, u8 reg) argument
68 u32 sample = readl(rtc
103 struct armada38x_rtc *rtc = dev_get_priv(dev); local
115 struct armada38x_rtc *rtc = dev_get_priv(dev); local
132 struct armada38x_rtc *rtc = dev_get_priv(dev); local
148 struct armada38x_rtc *rtc = dev_get_priv(dev); local
[all...]
H A Dmax313xx.c10 #include <rtc.h>
232 struct max313xx_priv *rtc = dev_get_priv(dev); local
236 ret = dm_i2c_read(dev, rtc->chip->sec_reg, regs, 7);
260 struct max313xx_priv *rtc = dev_get_priv(dev); local
274 if (rtc->chip->rst_bit) {
275 ret = max313xx_clear_bits(dev, rtc->chip->rst_reg, rtc->chip->rst_bit);
291 ret = dm_i2c_write(dev, rtc->chip->sec_reg, regs, 7);
295 switch (rtc->id) {
320 struct max313xx_priv *rtc local
349 struct max313xx_priv *rtc = dev_get_priv(dev); local
369 struct max313xx_priv *rtc = dev_get_priv(dev); local
[all...]
H A DMakefile7 obj-$(CONFIG_$(SPL_TPL_)DM_RTC) += rtc-uclass.o
24 obj-$(CONFIG_RTC_MC13XXX) += mc13xxx-rtc.o
H A Dmxsrtc.c10 #include <rtc.h>
H A Dsandbox_rtc.c10 #include <rtc.h>
11 #include <asm/rtc.h>
103 { .compatible = "sandbox-rtc" },
H A Demul_rtc.c12 #include <rtc.h>
/u-boot/drivers/bootcount/
H A Drtc.c10 #include <rtc.h>
15 struct udevice *rtc; member in struct:bootcount_rtc_priv
24 if (rtc_write16(priv->rtc, priv->offset, val) < 0) {
37 if (rtc_read16(priv->rtc, priv->offset, &val) < 0) {
55 struct udevice *rtc; local
57 if (dev_read_phandle_with_args(dev, "rtc", NULL, 0, 0, &phandle_args)) {
58 debug("%s: rtc backing device not specified\n", dev->name);
62 if (uclass_get_device_by_ofnode(UCLASS_RTC, phandle_args.node, &rtc)) {
67 priv->rtc = rtc;
[all...]
H A DMakefile14 obj-$(CONFIG_DM_BOOTCOUNT_RTC) += rtc.o
/u-boot/drivers/reboot-mode/
H A DMakefile9 obj-$(CONFIG_DM_REBOOT_MODE_RTC) += reboot-mode-rtc.o
H A Dreboot-mode-rtc.c9 #include <reboot-mode/reboot-mode-rtc.h>
11 #include <rtc.h>
29 ret = rtc_read8(plat_data->rtc, plat_data->addr + i);
62 ret = rtc_write8(plat_data->rtc, (plat_data->addr + i), val[i]);
80 if (dev_read_phandle_with_args(dev, "rtc", NULL, 0, 0, &phandle_args)) {
86 &plat_data->rtc)) {
108 { .compatible = "reboot-mode-rtc", 0 },
119 .name = "reboot-mode-rtc",
/u-boot/board/phytec/common/
H A Dimx8m_som_detection.c155 u8 rtc; local
165 rtc = PHYTEC_GET_OPTION(opt[5]);
166 rtc &= 0x4;
167 rtc = !(rtc >> 2);
169 rtc = PHYTEC_EEPROM_INVAL;
171 debug("%s: rtc: %u\n", __func__, rtc);
172 return rtc;
H A Dam6_som_detection.c126 u8 rtc = phytec_check_opt(data, 7); local
128 pr_debug("%s: rtc: %u\n", __func__, rtc);
129 return rtc;
/u-boot/arch/arm/mach-omap2/am33xx/
H A Dboard.c286 static void rtc32k_unlock(struct davinci_rtc *rtc) argument
293 writel(RTC_KICK0R_WE, &rtc->kick0r);
294 writel(RTC_KICK1R_WE, &rtc->kick1r);
313 struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; local
318 rtc32k_unlock(rtc);
321 writel(magic, &rtc->scratch1);
351 struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; local
353 rtc32k_unlock(rtc);
356 writel((1 << 3) | (1 << 6), &rtc->osc);
392 * Check if we are executing rtc
396 struct davinci_rtc *rtc = (struct davinci_rtc *)RTC_BASE; local
[all...]
/u-boot/test/dm/
H A Dreboot-mode.c12 #include <asm/rtc.h>
17 #include <rtc.h>
54 uclass_get_device_by_name(UCLASS_RTC, "rtc@43",
/u-boot/board/ge/common/
H A Dge_rtc.c9 #include <rtc.h>
/u-boot/arch/arm/include/asm/arch-mxs/
H A Dimx-regs.h22 #include <asm/arch/regs-rtc.h>
/u-boot/lib/efi_selftest/
H A Defi_selftest_rtc.c97 EFI_UNIT_TEST(rtc) = { variable
/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dtimer.h74 struct sunxi_rtc rtc; member in struct:sunxi_timer_reg
/u-boot/lib/
H A Ddate.c9 #include <rtc.h>
H A Drtc-lib.c3 * rtc and date/time utility functions
13 #include <rtc.h>
/u-boot/arch/x86/lib/fsp/
H A Dfsp_common.c12 #include <rtc.h>

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