Searched refs:rst (Results 1 - 25 of 78) sorted by relevance

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/u-boot/drivers/reset/
H A Dreset-zynqmp.c29 static int zynqmp_reset_assert(struct reset_ctl *rst) argument
31 struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev);
33 dev_dbg(rst->dev, "%s(rst=%p) (id=%lu)\n", __func__, rst, rst->id);
35 return zynqmp_pm_reset_assert(priv->reset_id + rst->id,
39 static int zynqmp_reset_deassert(struct reset_ctl *rst) argument
41 struct zynqmp_reset_priv *priv = dev_get_priv(rst->dev);
43 dev_dbg(rst
49 zynqmp_reset_request(struct reset_ctl *rst) argument
[all...]
H A Dreset-hisilicon.c19 static int hisi_reset_deassert(struct reset_ctl *rst) argument
21 struct hisi_reset_priv *priv = dev_get_priv(rst->dev);
24 val = readl(priv->base + rst->data);
25 if (rst->polarity & DEASSERT_SET)
26 val |= BIT(rst->id);
28 val &= ~BIT(rst->id);
29 writel(val, priv->base + rst->data);
34 static int hisi_reset_assert(struct reset_ctl *rst) argument
36 struct hisi_reset_priv *priv = dev_get_priv(rst->dev);
39 val = readl(priv->base + rst
49 hisi_reset_of_xlate(struct reset_ctl *rst, struct ofnode_phandle_args *args) argument
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H A Dreset-ti-sci.c46 static int ti_sci_reset_of_xlate(struct reset_ctl *rst, argument
49 debug("%s(rst=%p, args_count=%d)\n", __func__, rst, args->args_count);
60 rst->id = args->args[0];
61 rst->data = args->args[1];
68 * @rst: Handle to a single reset signal
81 static int ti_sci_reset_set(struct reset_ctl *rst, bool assert) argument
83 struct ti_sci_reset_data *data = dev_get_priv(rst->dev);
89 ret = dops->get_device_resets(sci, rst->id, &reset_state);
91 dev_err(rst
122 ti_sci_reset_assert(struct reset_ctl *rst) argument
139 ti_sci_reset_deassert(struct reset_ctl *rst) argument
157 ti_sci_reset_status(struct reset_ctl *rst) argument
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H A Dreset-npcm.c15 static int npcm_reset_request(struct reset_ctl *rst) argument
20 static int npcm_reset_free(struct reset_ctl *rst) argument
25 static int npcm_reset_assert(struct reset_ctl *rst) argument
27 struct npcm_reset_priv *priv = dev_get_priv(rst->dev);
30 debug("%s: id 0x%lx, data %ld\n", __func__, rst->id, rst->data);
31 val = readl(priv->base + rst->id);
32 val |= BIT(rst->data);
33 writel(val, priv->base + rst->id);
38 static int npcm_reset_deassert(struct reset_ctl *rst) argument
51 npcm_reset_xlate(struct reset_ctl *rst, struct ofnode_phandle_args *args) argument
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H A Dreset-hsdk.c44 static void hsdk_reset_config(struct hsdk_rst *rst, unsigned long id) argument
46 writel(rst_map[id], rst->regs_ctl + CGU_SYS_RST_CTRL);
49 static int hsdk_reset_do(struct hsdk_rst *rst) argument
53 reg = readl(rst->regs_rst + CGU_IP_SW_RESET);
57 writel(reg, rst->regs_rst + CGU_IP_SW_RESET);
60 return readl_poll_timeout(rst->regs_rst + CGU_IP_SW_RESET, reg,
67 struct hsdk_rst *rst = dev_get_priv(dev); local
75 hsdk_reset_config(rst, rst_ctl->id);
76 return hsdk_reset_do(rst);
90 struct hsdk_rst *rst local
[all...]
H A Dreset-scmi.c16 static int scmi_reset_set_level(struct reset_ctl *rst, bool assert_not_deassert) argument
19 .domain_id = rst->id,
29 ret = devm_scmi_process_msg(rst->dev, &msg);
36 static int scmi_reset_assert(struct reset_ctl *rst) argument
38 return scmi_reset_set_level(rst, true);
41 static int scmi_reset_deassert(struct reset_ctl *rst) argument
43 return scmi_reset_set_level(rst, false);
46 static int scmi_reset_request(struct reset_ctl *rst) argument
49 .domain_id = rst->id,
61 ret = devm_scmi_process_msg(rst
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H A Dreset-sifive.c24 static int sifive_rst_trigger(struct reset_ctl *rst, bool level) argument
26 struct sifive_reset_priv *priv = dev_get_priv(rst->dev);
27 int id = rst->id;
30 /* Derive bitposition from rst id */
43 static int sifive_reset_assert(struct reset_ctl *rst) argument
45 return sifive_rst_trigger(rst, false);
48 static int sifive_reset_deassert(struct reset_ctl *rst) argument
50 return sifive_rst_trigger(rst, true);
53 static int sifive_reset_request(struct reset_ctl *rst) argument
55 struct sifive_reset_priv *priv = dev_get_priv(rst
[all...]
H A Dreset-bcm6345.c25 static int bcm6345_reset_assert(struct reset_ctl *rst) argument
27 struct bcm6345_reset_priv *priv = dev_get_priv(rst->dev);
29 clrbits_be32(priv->regs, BIT(rst->id));
35 static int bcm6345_reset_deassert(struct reset_ctl *rst) argument
37 struct bcm6345_reset_priv *priv = dev_get_priv(rst->dev);
39 setbits_be32(priv->regs, BIT(rst->id));
45 static int bcm6345_reset_request(struct reset_ctl *rst) argument
47 if (rst->id >= MAX_RESETS)
50 return bcm6345_reset_assert(rst);
H A Dreset-syscon.c22 static int syscon_reset_request(struct reset_ctl *rst) argument
24 struct syscon_reset_priv *priv = dev_get_priv(rst->dev);
26 if (BIT(rst->id) & priv->mask)
32 static int syscon_reset_assert(struct reset_ctl *rst) argument
34 struct syscon_reset_priv *priv = dev_get_priv(rst->dev);
36 return regmap_update_bits(priv->regmap, priv->offset, BIT(rst->id),
37 priv->assert_high ? BIT(rst->id) : 0);
40 static int syscon_reset_deassert(struct reset_ctl *rst) argument
42 struct syscon_reset_priv *priv = dev_get_priv(rst->dev);
44 return regmap_update_bits(priv->regmap, priv->offset, BIT(rst
[all...]
H A Dreset-imx7.c68 static int imx7_reset_deassert(struct reset_ctl *rst) argument
70 struct imx_reset_priv *priv = dev_get_priv(rst->dev);
74 if (rst->id >= IMX7_RESET_NUM)
77 if (rst->id == IMX7_RESET_PCIEPHY) {
85 val = readl(priv->base + sig[rst->id].offset);
86 switch (rst->id) {
88 val |= sig[rst->id].bit;
91 val &= ~sig[rst->id].bit;
94 writel(val, priv->base + sig[rst->id].offset);
99 static int imx7_reset_assert(struct reset_ctl *rst) argument
189 imx8mq_reset_deassert(struct reset_ctl *rst) argument
227 imx8mq_reset_assert(struct reset_ctl *rst) argument
309 imx8mp_reset_set(struct reset_ctl *rst, bool assert) argument
342 imx8mp_reset_assert(struct reset_ctl *rst) argument
347 imx8mp_reset_deassert(struct reset_ctl *rst) argument
352 imx_reset_assert(struct reset_ctl *rst) argument
358 imx_reset_deassert(struct reset_ctl *rst) argument
[all...]
H A Dreset-jh7110.c90 static int jh7110_reset_assert(struct reset_ctl *rst) argument
92 struct jh7110_reset_priv *priv = dev_get_priv(rst->dev);
94 jh7110_reset_trigger(priv, rst->id, true);
99 static int jh7110_reset_deassert(struct reset_ctl *rst) argument
101 struct jh7110_reset_priv *priv = dev_get_priv(rst->dev);
103 jh7110_reset_trigger(priv, rst->id, false);
108 static int jh7110_reset_free(struct reset_ctl *rst) argument
113 static int jh7110_reset_request(struct reset_ctl *rst) argument
115 struct jh7110_reset_priv *priv = dev_get_priv(rst->dev);
117 if (rst
[all...]
/u-boot/arch/arm/mach-mvebu/
H A Dsystem-controller.c32 static int mvebu_reset_of_xlate(struct reset_ctl *rst, argument
38 rst->id = args->args[0];
39 rst->data = args->args[1];
42 if (rst->id != MVEBU_PCIE_ID)
46 if (!(rst->data >= 0 && rst->data <= 3))
52 static int mvebu_reset_request(struct reset_ctl *rst) argument
57 static int mvebu_reset_free(struct reset_ctl *rst) argument
62 static int mvebu_reset_assert(struct reset_ctl *rst) argument
64 struct regmap *regmap = syscon_get_regmap(rst
70 mvebu_reset_deassert(struct reset_ctl *rst) argument
78 mvebu_reset_status(struct reset_ctl *rst) argument
[all...]
/u-boot/arch/x86/include/asm/
H A Dintel_pinctrl_defs.h165 #define PAD_CFG_NF(pad, pull, rst, func) \
166 _PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
174 #define PAD_CFG_NF_1V8(pad, pull, rst, func) \
175 _PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) |\
180 #define PAD_CFG_NF_IOSSTATE(pad, pull, rst, func, iosstate) \
181 _PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
188 #define PAD_CFG_NF_IOSTANDBY_IGNORE(pad, pull, rst, func) \
189 _PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull) | \
196 #define PAD_CFG_NF_IOSSTATE_IOSTERM(pad, pull, rst, func, iosstate, iosterm) \
197 _PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUN
[all...]
/u-boot/test/dm/
H A Dsyscon-reset.c29 struct reset_ctl rst; local
43 ut_asserteq(-EINVAL, reset_get_by_name(reset, "no_mask", &rst));
44 ut_asserteq(-EINVAL, reset_get_by_name(reset, "out_of_range", &rst));
45 ut_assertok(reset_get_by_name(reset, "valid", &rst));
49 ut_assertok(reset_assert(&rst));
53 ut_assertok(reset_deassert(&rst));
/u-boot/board/phytium/pomelo/
H A Dpll.c58 u32 rst; local
60 rst = get_reset_source();
62 switch (rst) {
/u-boot/doc/media/
H A DMakefile7 FILES = linker_lists.h.rst
20 $(BUILDDIR)/linker_lists.h.rst: ${API}/linker_lists.h ${PARSER} $(SRC_DIR)/linker_lists.h.rst.exceptions
/u-boot/board/phytium/pe2201/
H A Dpll.c60 u32 rst; local
62 rst = get_reset_source();
64 switch (rst) {
/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dreset_manager_gen5.h9 #include <dt-bindings/reset/altr,rst-mgr.h>
/u-boot/arch/arm/mach-npcm/npcm8xx/
H A Dreset.c9 #include <asm/arch/rst.h>
/u-boot/drivers/ram/starfive/
H A Dstarfive_ddr.c29 struct reset_ctl_bulk rst; member in struct:starfive_ddr_priv
107 ret = reset_get_bulk(dev, &priv->rst);
111 ret = reset_deassert_bulk(&priv->rst);
129 reset_release_bulk(&priv->rst);
/u-boot/drivers/watchdog/
H A Dcdns_wdt.c27 bool rst; member in struct:cdns_wdt_priv
183 if (priv->rst) {
278 priv->rst = dev_read_bool(dev, "reset-on-timeout");
280 debug("%s: reset %d\n", __func__, priv->rst);
H A Dstarfive_wdt.c69 struct reset_ctl_bulk *rst; member in struct:starfive_wdt_priv
267 ret = reset_deassert_bulk(wdt->rst);
282 reset_assert_bulk(wdt->rst);
305 wdt->rst = devm_reset_bulk_get(dev);
306 if (IS_ERR(wdt->rst))
/u-boot/drivers/clk/qcom/
H A Dclock-qcom.c290 static int qcom_reset_set(struct reset_ctl *rst, bool assert) argument
292 struct msm_clk_data *data = (struct msm_clk_data *)dev_get_driver_data(rst->dev);
293 void __iomem *base = dev_get_priv(rst->dev);
297 map = &data->resets[rst->id];
311 static int qcom_reset_assert(struct reset_ctl *rst) argument
313 return qcom_reset_set(rst, true);
316 static int qcom_reset_deassert(struct reset_ctl *rst) argument
318 return qcom_reset_set(rst, false);
/u-boot/board/freescale/common/
H A Dqixis.c147 u8 rst; local
149 rst = QIXIS_READ(rst_frc[0]);
150 if (!(rst & QIXIS_RST_FORCE_MEM))
151 QIXIS_WRITE(rst_frc[0], rst | QIXIS_RST_FORCE_MEM);
156 u8 rst; local
158 rst = QIXIS_READ(rst_frc[0]);
159 if (rst & QIXIS_RST_FORCE_MEM)
160 QIXIS_WRITE(rst_frc[0], rst & ~QIXIS_RST_FORCE_MEM);
/u-boot/drivers/rng/
H A Djh7110_rng.c84 struct reset_ctl *rst; member in struct:starfive_trng_plat
210 err = reset_deassert(pdata->rst);
223 reset_assert(pdata->rst);
248 pdata->rst = devm_reset_control_get(dev, NULL);
249 if (IS_ERR(pdata->rst))

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