| /u-boot/arch/arm/mach-davinci/ |
| H A D | cpu.c | 41 int post_div; local
71 post_div = (readl(pll_base + PLLC_POSTDIV) &
74 pll_out /= post_div;
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| /u-boot/drivers/clk/aspeed/ |
| H A D | clk_ast2500.c | 56 unsigned int post_div; member in struct:ast2500_div_config
68 const ulong post_div = (mpll_reg & SCU_MPLL_POST_MASK) local
71 return (clkin * ((num + 1) / (denum + 1))) / (post_div + 1);
83 const ulong post_div = (hpll_reg & SCU_HPLL_POST_MASK) local
86 return (clkin * ((num + 1) / (denum + 1))) / (post_div + 1);
214 { 24000000, 250000000, { .num = 124, .denum = 1, .post_div = 5 } },
267 for (it.post_div = 0; it.post_div <= max_vals.post_div;
268 ++it.post_div) {
[all...] |
| /u-boot/drivers/spi/ |
| H A D | mxc_spi.c | 220 u32 pre_div = 0, post_div = 0; local
238 post_div = fls(pre_div);
239 if (post_div > 4) {
240 post_div -= 4;
241 if (post_div >= 16) {
246 pre_div >>= post_div; local
248 post_div = 0;
252 debug("pre_div = %d, post_div=%d\n", pre_div, post_div);
258 MXC_CSPICTRL_POSTDIV(post_div);
[all...] |
| /u-boot/arch/arm/include/asm/arch-mx7/ |
| H A D | clock_slice.h | 111 enum root_post_div post_div, enum clk_root_src clock_src);
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| /u-boot/arch/arm/mach-imx/imx8m/ |
| H A D | clock_imx8mm.c | 506 u32 main_div, pre_div, post_div, div; local
642 post_div = (pll_div_ctl & INTPLL_POST_DIV_MASK) >>
647 return lldiv(freq, pre_div * (1 << post_div) * div);
653 u32 main_div, pre_div, post_div, k; local
706 post_div = (pll_fdiv_ctl0 & SDIV_MASK) >>
712 65536 * pre_div * (1 << post_div));
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| H A D | clock_slice.c | 1802 enum root_post_div *post_div)
1820 *post_div = 0;
1839 *post_div = val;
1801 clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *post_div) argument
|
| /u-boot/arch/arm/mach-imx/mx6/ |
| H A D | clock.c | 612 u32 post_div)
628 switch (post_div) {
686 u32 pll_div, pll_num, pll_denom, post_div = 1; local
721 * No need to check post_div(1)
723 for (post_div = 2; post_div <= 4; post_div <<= 1) {
724 if ((temp * post_div) > min) {
725 freq *= post_div;
730 if (post_div >
611 enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom, u32 post_div) argument
[all...] |
| /u-boot/arch/arm/include/asm/arch-imx8m/ |
| H A D | clock.h | 267 enum root_post_div post_div, enum clk_root_src clock_src);
272 enum root_post_div *post_div);
|
| /u-boot/arch/arm/mach-imx/mx7/ |
| H A D | clock.c | 478 enum root_post_div post_div; local
488 post_div = reg & DRAM_CLK_ROOT_POST_DIV_MASK;
490 return freq / (post_div + 1) / 2;
780 u32 post_div)
798 switch (post_div) {
902 u32 pll_div, pll_num, pll_denom, post_div = 0; local
913 post_div = i;
950 if (enable_pll_video(pll_div, pll_num, pll_denom, post_div))
779 enable_pll_video(u32 pll_div, u32 pll_num, u32 pll_denom, u32 post_div) argument
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| H A D | clock_slice.c | 672 enum root_post_div post_div, enum clk_root_src clock_src)
698 if (post_div > CLK_ROOT_POST_DIV7) {
705 if (post_div != CLK_ROOT_POST_DIV1) {
716 post_div << CLK_ROOT_POST_DIV_SHIFT |
671 clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div, enum root_post_div post_div, enum clk_root_src clock_src) argument
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| /u-boot/board/gdsys/common/ |
| H A D | osd.c | 84 unsigned int *post_div, unsigned int *feedback_div)
86 unsigned int n = *post_div;
104 *post_div = n;
83 mpc92469ac_calc_parameters(unsigned int fout, unsigned int *post_div, unsigned int *feedback_div) argument
|