#
d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
7d2bf7c2 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
spi: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
05d36027 |
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08-Feb-2024 |
Marek Vasut <marex@denx.de> |
spi: mxc_spi: Add imx6ul-ecspi compatible string Recent i.MX8MP DTs use new fsl,imx6ul-ecspi compatible string instead of the fsl,imx51-ecspi compatible string. Add the new compatible string to fix ECSPI operation on i.MX8MP. For details, see Linux: 48d74376fb68 ("arm64: dts: imx8mp: update ecspi compatible and clk") 8eb1252bbedf ("spi: imx: remove ERR009165 workaround on i.mx6ul") Fixes: 451799a6ceac ("arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4") Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Marek Vasut <marex@denx.de> |
#
1e94b46f |
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14-Sep-2023 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/printk.h from common header This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6e7df1d1 |
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10-Jan-2023 |
Tom Rini <trini@konsulko.com> |
global: Finish CONFIG -> CFG migration At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2568bd6d |
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19-Nov-2022 |
Tom Rini <trini@konsulko.com> |
arm: Remove unused mx27 code We no longer have any i.MX27 platforms, remove the remaining support code. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6f753d8c |
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06-Nov-2021 |
Haolin Li <li.haolin@qq.com> |
spi: mxc_spi: remove redundant code in spi_xchg_single() The value of cnt is overwritten without being used. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> |
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8ba59608 |
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09-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove zmx25 board and ARCH_MX25 This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last ARCH_MX25 platform, remove those references as well. Cc: Matthias Weisser <weisserm@arcor.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
14b38cb0 |
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14-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove flea3 board This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last mx35 platform, remove that support as well. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
375d7e92 |
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10-Jul-2021 |
Stefano Babic <sbabic@denx.de> |
spi: mxc_spi: fix warnings if CLK_ENABLED not set Following warnings (unused variables) are raised: drivers/spi/mxc_spi.c: In function 'mxc_spi_probe': drivers/spi/mxc_spi.c:595:14: error: unused variable 'blob' [-Werror=unused-variable] 595 | const void *blob = gd->fdt_blob; | ^~~~ drivers/spi/mxc_spi.c:594:6: error: unused variable 'node' [-Werror=unused-variable] 594 | int node = dev_of_offset(bus); Move the variable declaration inside the code where they are used. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
7d2bf7c2 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
spi: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
05d36027 |
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08-Feb-2024 |
Marek Vasut <marex@denx.de> |
spi: mxc_spi: Add imx6ul-ecspi compatible string Recent i.MX8MP DTs use new fsl,imx6ul-ecspi compatible string instead of the fsl,imx51-ecspi compatible string. Add the new compatible string to fix ECSPI operation on i.MX8MP. For details, see Linux: 48d74376fb68 ("arm64: dts: imx8mp: update ecspi compatible and clk") 8eb1252bbedf ("spi: imx: remove ERR009165 workaround on i.mx6ul") Fixes: 451799a6ceac ("arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4") Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Marek Vasut <marex@denx.de> |
#
1e94b46f |
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14-Sep-2023 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/printk.h from common header This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6e7df1d1 |
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10-Jan-2023 |
Tom Rini <trini@konsulko.com> |
global: Finish CONFIG -> CFG migration At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2568bd6d |
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19-Nov-2022 |
Tom Rini <trini@konsulko.com> |
arm: Remove unused mx27 code We no longer have any i.MX27 platforms, remove the remaining support code. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6f753d8c |
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06-Nov-2021 |
Haolin Li <li.haolin@qq.com> |
spi: mxc_spi: remove redundant code in spi_xchg_single() The value of cnt is overwritten without being used. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> |
#
8ba59608 |
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09-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove zmx25 board and ARCH_MX25 This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last ARCH_MX25 platform, remove those references as well. Cc: Matthias Weisser <weisserm@arcor.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
14b38cb0 |
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14-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove flea3 board This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last mx35 platform, remove that support as well. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
375d7e92 |
|
10-Jul-2021 |
Stefano Babic <sbabic@denx.de> |
spi: mxc_spi: fix warnings if CLK_ENABLED not set Following warnings (unused variables) are raised: drivers/spi/mxc_spi.c: In function 'mxc_spi_probe': drivers/spi/mxc_spi.c:595:14: error: unused variable 'blob' [-Werror=unused-variable] 595 | const void *blob = gd->fdt_blob; | ^~~~ drivers/spi/mxc_spi.c:594:6: error: unused variable 'node' [-Werror=unused-variable] 594 | int node = dev_of_offset(bus); Move the variable declaration inside the code where they are used. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
|
08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
|
14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
|
08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
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8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
05d36027 |
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08-Feb-2024 |
Marek Vasut <marex@denx.de> |
spi: mxc_spi: Add imx6ul-ecspi compatible string Recent i.MX8MP DTs use new fsl,imx6ul-ecspi compatible string instead of the fsl,imx51-ecspi compatible string. Add the new compatible string to fix ECSPI operation on i.MX8MP. For details, see Linux: 48d74376fb68 ("arm64: dts: imx8mp: update ecspi compatible and clk") 8eb1252bbedf ("spi: imx: remove ERR009165 workaround on i.mx6ul") Fixes: 451799a6ceac ("arm: dts: imx8mp: Sync the DT with kernel 6.4-rc4") Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Marek Vasut <marex@denx.de> |
#
1e94b46f |
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14-Sep-2023 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/printk.h from common header This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
6e7df1d1 |
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10-Jan-2023 |
Tom Rini <trini@konsulko.com> |
global: Finish CONFIG -> CFG migration At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2568bd6d |
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19-Nov-2022 |
Tom Rini <trini@konsulko.com> |
arm: Remove unused mx27 code We no longer have any i.MX27 platforms, remove the remaining support code. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6f753d8c |
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06-Nov-2021 |
Haolin Li <li.haolin@qq.com> |
spi: mxc_spi: remove redundant code in spi_xchg_single() The value of cnt is overwritten without being used. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> |
#
8ba59608 |
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09-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove zmx25 board and ARCH_MX25 This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last ARCH_MX25 platform, remove those references as well. Cc: Matthias Weisser <weisserm@arcor.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
14b38cb0 |
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14-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove flea3 board This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last mx35 platform, remove that support as well. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
375d7e92 |
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10-Jul-2021 |
Stefano Babic <sbabic@denx.de> |
spi: mxc_spi: fix warnings if CLK_ENABLED not set Following warnings (unused variables) are raised: drivers/spi/mxc_spi.c: In function 'mxc_spi_probe': drivers/spi/mxc_spi.c:595:14: error: unused variable 'blob' [-Werror=unused-variable] 595 | const void *blob = gd->fdt_blob; | ^~~~ drivers/spi/mxc_spi.c:594:6: error: unused variable 'node' [-Werror=unused-variable] 594 | int node = dev_of_offset(bus); Move the variable declaration inside the code where they are used. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
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d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
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3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
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08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
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d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
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9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
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86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
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dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
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c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
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2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
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c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
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fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
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f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
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d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
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53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
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38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
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1e94b46f |
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14-Sep-2023 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/printk.h from common header This old patch was marked as deferred. Bring it back to life, to continue towards the removal of common.h Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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6e7df1d1 |
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10-Jan-2023 |
Tom Rini <trini@konsulko.com> |
global: Finish CONFIG -> CFG migration At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
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2568bd6d |
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19-Nov-2022 |
Tom Rini <trini@konsulko.com> |
arm: Remove unused mx27 code We no longer have any i.MX27 platforms, remove the remaining support code. Signed-off-by: Tom Rini <trini@konsulko.com> |
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6f753d8c |
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06-Nov-2021 |
Haolin Li <li.haolin@qq.com> |
spi: mxc_spi: remove redundant code in spi_xchg_single() The value of cnt is overwritten without being used. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> |
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8ba59608 |
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09-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove zmx25 board and ARCH_MX25 This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last ARCH_MX25 platform, remove those references as well. Cc: Matthias Weisser <weisserm@arcor.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
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14b38cb0 |
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14-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove flea3 board This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last mx35 platform, remove that support as well. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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375d7e92 |
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10-Jul-2021 |
Stefano Babic <sbabic@denx.de> |
spi: mxc_spi: fix warnings if CLK_ENABLED not set Following warnings (unused variables) are raised: drivers/spi/mxc_spi.c: In function 'mxc_spi_probe': drivers/spi/mxc_spi.c:595:14: error: unused variable 'blob' [-Werror=unused-variable] 595 | const void *blob = gd->fdt_blob; | ^~~~ drivers/spi/mxc_spi.c:594:6: error: unused variable 'node' [-Werror=unused-variable] 594 | int node = dev_of_offset(bus); Move the variable declaration inside the code where they are used. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
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38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
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6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
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8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2548493a |
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16-Jul-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
|
08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
|
14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
|
10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
|
21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
|
13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
|
14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
6e7df1d1 |
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10-Jan-2023 |
Tom Rini <trini@konsulko.com> |
global: Finish CONFIG -> CFG migration At this point, the remaining places where we have a symbol that is defined as CONFIG_... are in fairly odd locations. While as much dead code has been removed as possible, some of these locations are simply less obvious at first. In other cases, this code is used, but was defined in such a way as to have been missed by earlier checks. Perform a rename of all such remaining symbols to be CFG_... rather than CONFIG_... Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
2568bd6d |
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19-Nov-2022 |
Tom Rini <trini@konsulko.com> |
arm: Remove unused mx27 code We no longer have any i.MX27 platforms, remove the remaining support code. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6f753d8c |
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06-Nov-2021 |
Haolin Li <li.haolin@qq.com> |
spi: mxc_spi: remove redundant code in spi_xchg_single() The value of cnt is overwritten without being used. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> |
#
8ba59608 |
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09-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove zmx25 board and ARCH_MX25 This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last ARCH_MX25 platform, remove those references as well. Cc: Matthias Weisser <weisserm@arcor.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
14b38cb0 |
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14-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove flea3 board This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last mx35 platform, remove that support as well. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
375d7e92 |
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10-Jul-2021 |
Stefano Babic <sbabic@denx.de> |
spi: mxc_spi: fix warnings if CLK_ENABLED not set Following warnings (unused variables) are raised: drivers/spi/mxc_spi.c: In function 'mxc_spi_probe': drivers/spi/mxc_spi.c:595:14: error: unused variable 'blob' [-Werror=unused-variable] 595 | const void *blob = gd->fdt_blob; | ^~~~ drivers/spi/mxc_spi.c:594:6: error: unused variable 'node' [-Werror=unused-variable] 594 | int node = dev_of_offset(bus); Move the variable declaration inside the code where they are used. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
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8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
|
30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
|
20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
|
14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
|
08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
|
14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
|
14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
0f1411bc |
|
09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
|
15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
|
15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
|
17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
|
10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
|
21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
|
14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
|
19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
|
19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
|
06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
|
09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
|
13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
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53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
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38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
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2568bd6d |
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19-Nov-2022 |
Tom Rini <trini@konsulko.com> |
arm: Remove unused mx27 code We no longer have any i.MX27 platforms, remove the remaining support code. Signed-off-by: Tom Rini <trini@konsulko.com> |
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6f753d8c |
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06-Nov-2021 |
Haolin Li <li.haolin@qq.com> |
spi: mxc_spi: remove redundant code in spi_xchg_single() The value of cnt is overwritten without being used. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> |
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8ba59608 |
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09-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove zmx25 board and ARCH_MX25 This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last ARCH_MX25 platform, remove those references as well. Cc: Matthias Weisser <weisserm@arcor.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
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14b38cb0 |
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14-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove flea3 board This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last mx35 platform, remove that support as well. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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375d7e92 |
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10-Jul-2021 |
Stefano Babic <sbabic@denx.de> |
spi: mxc_spi: fix warnings if CLK_ENABLED not set Following warnings (unused variables) are raised: drivers/spi/mxc_spi.c: In function 'mxc_spi_probe': drivers/spi/mxc_spi.c:595:14: error: unused variable 'blob' [-Werror=unused-variable] 595 | const void *blob = gd->fdt_blob; | ^~~~ drivers/spi/mxc_spi.c:594:6: error: unused variable 'node' [-Werror=unused-variable] 594 | int node = dev_of_offset(bus); Move the variable declaration inside the code where they are used. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
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38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
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6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
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8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
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2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
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e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
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552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
6f753d8c |
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06-Nov-2021 |
Haolin Li <li.haolin@qq.com> |
spi: mxc_spi: remove redundant code in spi_xchg_single() The value of cnt is overwritten without being used. Signed-off-by: Haolin Li <li.haolin@qq.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> |
#
8ba59608 |
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09-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove zmx25 board and ARCH_MX25 This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last ARCH_MX25 platform, remove those references as well. Cc: Matthias Weisser <weisserm@arcor.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
14b38cb0 |
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14-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove flea3 board This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last mx35 platform, remove that support as well. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
375d7e92 |
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10-Jul-2021 |
Stefano Babic <sbabic@denx.de> |
spi: mxc_spi: fix warnings if CLK_ENABLED not set Following warnings (unused variables) are raised: drivers/spi/mxc_spi.c: In function 'mxc_spi_probe': drivers/spi/mxc_spi.c:595:14: error: unused variable 'blob' [-Werror=unused-variable] 595 | const void *blob = gd->fdt_blob; | ^~~~ drivers/spi/mxc_spi.c:594:6: error: unused variable 'node' [-Werror=unused-variable] 594 | int node = dev_of_offset(bus); Move the variable declaration inside the code where they are used. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
38b92ca1 |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
|
18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
8a8d24bd |
|
03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
|
16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
|
08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
|
14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
|
17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
|
08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
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9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
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8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
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d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
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08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
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d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
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9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
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86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
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dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
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c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
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53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
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38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
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8ba59608 |
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09-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove zmx25 board and ARCH_MX25 This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last ARCH_MX25 platform, remove those references as well. Cc: Matthias Weisser <weisserm@arcor.de> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> |
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14b38cb0 |
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14-Sep-2021 |
Tom Rini <trini@konsulko.com> |
arm: Remove flea3 board This board has not been converted to CONFIG_DM by the deadline. Remove it. As this is the last mx35 platform, remove that support as well. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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375d7e92 |
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10-Jul-2021 |
Stefano Babic <sbabic@denx.de> |
spi: mxc_spi: fix warnings if CLK_ENABLED not set Following warnings (unused variables) are raised: drivers/spi/mxc_spi.c: In function 'mxc_spi_probe': drivers/spi/mxc_spi.c:595:14: error: unused variable 'blob' [-Werror=unused-variable] 595 | const void *blob = gd->fdt_blob; | ^~~~ drivers/spi/mxc_spi.c:594:6: error: unused variable 'node' [-Werror=unused-variable] 594 | int node = dev_of_offset(bus); Move the variable declaration inside the code where they are used. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
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38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
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6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
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8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
375d7e92 |
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10-Jul-2021 |
Stefano Babic <sbabic@denx.de> |
spi: mxc_spi: fix warnings if CLK_ENABLED not set Following warnings (unused variables) are raised: drivers/spi/mxc_spi.c: In function 'mxc_spi_probe': drivers/spi/mxc_spi.c:595:14: error: unused variable 'blob' [-Werror=unused-variable] 595 | const void *blob = gd->fdt_blob; | ^~~~ drivers/spi/mxc_spi.c:594:6: error: unused variable 'node' [-Werror=unused-variable] 594 | int node = dev_of_offset(bus); Move the variable declaration inside the code where they are used. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
|
29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
|
06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
|
30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
|
20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
|
14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
|
17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
|
15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
|
12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
9a30903b |
|
10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
|
08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
|
14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
|
14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
0f1411bc |
|
09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
d36b39bf |
|
20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
|
15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
|
15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
|
17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
|
10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
|
31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
|
21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
|
13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
|
14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
|
14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
|
19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
|
20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
|
19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
|
06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
|
09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
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38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
c1d264e8 |
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03-Feb-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Implement set_speed The set_speed() callback should configure the bus speed, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
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2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
#
8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
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08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
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d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
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9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
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c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
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53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
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38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
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38b92ca1 |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Use clock framework if enabled In case the clock framework is enabled, enable the SPI controller clock and obtain max frequency from the clock framework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
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6cd4f48b |
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18-Jan-2021 |
Marek Vasut <marex@denx.de> |
spi: imx: Define register bits in the driver The CSPI/ECSPI register bits do not differ between newer SoCs, instead of having multiple copies of the same thing for each iMX SoC, define the bits in the driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Stefano Babic <sbabic@denx.de> |
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8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
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60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
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cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
8a8d24bd |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename ..._platdata variables to just ..._plat Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c69cda25 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename dev_get_platdata() to dev_get_plat() Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org> |
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caa4daa2 |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename 'platdata' variables to just 'plat' We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org> |
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41575d8e |
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03-Dec-2020 |
Simon Glass <sjg@chromium.org> |
dm: treewide: Rename auto_alloc_size members to be shorter This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
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fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
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8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
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8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
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53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
2548493a |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
|
04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
|
20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
|
20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
|
20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
|
08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
|
29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
|
06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
|
30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
|
20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
|
14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
|
17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
|
15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
|
08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
|
14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
|
10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
|
21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
|
13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
|
14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
|
14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
|
15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
7208396b |
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24-Jul-2020 |
Tom Rini <trini@konsulko.com> |
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm" This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com> |
#
60e7fa8b |
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16-Jul-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert devfdt_get_addr() to dev_read_addr() When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
|
06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
|
30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
56c40460 |
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04-Jun-2020 |
Lukasz Majewski <lukma@denx.de> |
spi: Convert CONFIG_DM_SPI* to CONFIG_$(SPL_TPL_)DM_SPI* This change allows more fine tuning of driver model based SPI support in SPL and TPL. It is now possible to explicitly enable/disable the DM_SPI support in SPL and TPL via Kconfig option. Before this change it was necessary to use: /* SPI Flash Configs */ #if defined(CONFIG_SPL_BUILD) #undef CONFIG_DM_SPI #undef CONFIG_DM_SPI_FLASH #undef CONFIG_SPI_FLASH_MTD #endif in the ./include/configs/<board>.h, which is error prone and shall be avoided when we strive to switch to Kconfig. The goal of this patch: Provide distinction for DM_SPI support in both U-Boot proper and SPL (TPL). Valid use case is when U-Boot proper wants to use DM_SPI, but SPL must still support non DM driver. Another use case is the conversion of non DM/DTS SPI driver to support DM/DTS. When such driver needs to work in both SPL and U-Boot proper, the distinction is needed in Kconfig (also if SPL version of the driver supports OF_PLATDATA). In the end of the day one would have to support following use cases (in single driver file - e.g. mxs_spi.c): - U-Boot proper driver supporting DT/DTS - U-Boot proper driver without DT/DTS support (deprecated) - SPL driver without DT/DTS support - SPL (and TPL) driver with DT/DTS (when the SoC has enough resources to run full blown DT/DTS) - SPL driver with DT/DTS and SPL_OF_PLATDATA (when one have constrained environment with no fitImage and OF_LIBFDT support). Some boards do require SPI support (with DM) in SPL (TPL) and some only have DM_SPI{_FLASH} defined to allow compiling SPL. This patch converts #ifdef CONFIG_DM_SPI* to #if CONFIG_IS_ENABLED(DM_SPI) and provides corresponding defines in Kconfig. Signed-off-by: Lukasz Majewski <lukma@denx.de> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [trini: Fixup a few platforms] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
|
25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
|
04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
|
20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
|
20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
|
20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
|
08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
|
06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
|
30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
|
14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
|
08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
|
14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
|
10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
|
13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
|
14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
|
14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
|
19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
|
20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
|
19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
|
19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
|
09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
|
13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
|
06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
|
16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
|
20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
|
15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
cd93d625 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
336d4615 |
|
03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
7a3faf31 |
|
25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
|
25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
|
04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
|
20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
|
20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
|
20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
|
08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
|
29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
|
06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
|
30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
|
20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
|
14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
|
17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
|
15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
9a30903b |
|
10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
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8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
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be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
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de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
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08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
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d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
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9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
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dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
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2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
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c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
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d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
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53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
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38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
336d4615 |
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03-Feb-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Create a new header file for 'compat' features At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
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7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
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2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
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e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
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618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
|
23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
|
30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
|
20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
|
14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
|
17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
|
#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
|
08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
|
14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
|
#
0f1411bc |
|
09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
|
04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
|
18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
|
15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
|
15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
|
17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
|
10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
|
14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
|
19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
|
19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
|
09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
|
13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
7a3faf31 |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: work with cs greater 0 currently spi mxc driver can only handle cs 0. Allow it to handle also cs > 0. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
2b849e1f |
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25-May-2019 |
Heiko Schocher <hs@denx.de> |
spi: imx: remove doubled pointer from mxc_spi_probe in mxc_spi_probe() plat and mxcs pointer are created: struct mxc_spi_slave *plat = bus->platdata; struct mxc_spi_slave *mxcs = dev_get_platdata(bus); which have the same value. Remove plat pointer. Signed-off-by: Heiko Schocher <hs@denx.de> |
#
65a106e3 |
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04-Jan-2019 |
Ye Li <ye.li@nxp.com> |
spi: mxc_spi: Fix build warning on ARM64 platforms When building mxc_spi driver on ARM64 platforms, get below build warnings. Fix it in this patch. In file included from include/common.h:48:0, from drivers/spi/mxc_spi.c:9: drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’: drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] _func_, bitlen, (u32)dout, (u32)din); ^ include/log.h:135:26: note: in definition of macro ‘debug_cond’ printf(pr_fmt(fmt), ##args); \ ^~~~ drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’ debug("%s: bitlen %d dout 0x%x din 0x%x\n", ^~~~~ Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> |
#
e2cae514 |
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20-Nov-2018 |
Jagan Teki <jagan@amarulasolutions.com> |
spi: Remove unused spi_init Remove spi_init definition which never used on respective code since from many years. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> |
#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
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fbbbc86e |
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12-Jul-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
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#
9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com> |
#
9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> |
#
8dc16cf9 |
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14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
be08abc2 |
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04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
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#
d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> |
#
d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
#
784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de> |
#
cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> |
#
08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org> |
#
d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> |
#
86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> |
#
c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl> |
#
c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de> |
#
eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> |
#
fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de> |
#
53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> |
#
34ad7491 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass CS GPIO activation low/high is determinated by the device tree so we don't need to take in accoung in cs_activate and cs_deactivate Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
618e8e20 |
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20-Jun-2018 |
Michael Trimarchi <michael@amarulasolutions.com> |
spi: mxc: Fix compilation problem of DM_SPI class driver drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr' linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509 Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
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#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
994266bd |
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08-Aug-2017 |
Peng Fan <peng.fan@nxp.com> |
spi: mxc_spi: support driver model Add driver model support for mxc spi driver. Most functions are restructured to be reused by DM and non-DM. Tested on mx6slevk/mx6qsabresd board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
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#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
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#
b4141195 |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
linux/kernel.h: sync min, max, min3, max3 macros with Linux U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com>
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#
027a9a00 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: delay initialisation until claim bus it is not correct to init for a specific slave in spi_setup_slave. instead buffer the values and delay init until spi_claim_bus. Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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#
ba3451d3 |
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23-Oct-2014 |
Markus Niebel <Markus.Niebel@tq-group.com> |
SPI: mxc_spi: remove second reset from ECSPI config handler the second reset prevents other registers to be written. This will prevent to have the correct signal levels for SCLK before writing to the config reg in spi_xchg_single. Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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#
3acb011c |
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30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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#
155fa9af |
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20-Aug-2014 |
Nikita Kiryanov <nikita@compulab.co.il> |
spi: mxc: fix sf probe when using mxc_spi MXC SPI driver has a feature whereas a GPIO line can be used to force CS high across multiple transactions. This is set up by embedding the GPIO information in the CS value: cs = (cs | gpio << 8) This merge of cs and gpio data into one value breaks the sf probe command: if the use of gpio is required, invoking "sf probe <cs>" will not work, because the CS argument doesn't have the GPIO information in it. Instead, the user must use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must type "sf probe 15872". This is inconsistent with the description of the sf probe command, and forces the user to be aware of implementaiton details. Fix this by introducing a new board function: board_spi_cs_gpio(), which will accept a naked CS value, and provide the driver with the relevant GPIO, if one is necessary. Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Eric Benard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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#
f659b573 |
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14-Jul-2014 |
Heiko Schocher <hs@denx.de> |
spi, spi_mxc: do not hang in spi_xchg_single if status register do never set MXC_CSPICTRL_TC, spi_xchg_single endless loops. Add a timeout here to prevent endless hang. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Dirk Behme <dirk.behme@gmail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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#
5d584cce |
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17-Feb-2014 |
Markus Niebel <Markus.Niebel@tqs.de> |
spi: spi-mxc: implement clk control for ECSPI to fix SPI_MODE_3 SPI_MODE_3 requires clk high when inactive. The SCLK_CTL field of the config reg was not configured in case of CPOL. Fix configuration so that SPI_MODE_3 which uses CPOL configures the clk line to be high in inactive state. Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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#
6d5ce1bd |
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15-Oct-2013 |
Timo Herbrecher <t.herbrecher@gateware.de> |
spi: mxc_spi: Fix double incrementing read pointer for unaligned buffers If dout buffer is not 32 bit-aligned or data to transmit is not multiple of 32 bit the read data pointer is already incremented on single byte reads. Signed-off-by: Timo Herbrecher <t.herbrecher@gateware.de> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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9a30903b |
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10-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Update pre and post divider algorithm The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
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8d4c4ffb |
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08-May-2013 |
Dirk Behme <dirk.behme@gmail.com> |
spi: mxc_spi: Fix pre and post divider calculation Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
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9675fed4 |
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14-Jun-2013 |
Axel Lin <axel.lin@ingics.com> |
spi: mxc_spi: Use DIV_ROUND_UP at appropriate places This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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0f1411bc |
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09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling). Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function. Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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d36b39bf |
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20-Mar-2013 |
Dirk Behme <dirk.behme@de.bosch.com> |
spi: mxc_spi: Fix ECSPI reset handling Reviewing the ECSPI reset handling shows two issues: 1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg (ECSPIx_CONGREG) the i.MX6 technical reference manual states: -- cut -- ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block and resets the internal logic with the exception of the ECSPI_CONREG. -- cut -- Note the exception mentioned: The CONREG itself isn't reset. Fix this by manually writing the reset value 0 to the whole register. This sets the EN bit to zero, too (i.e. includes the old ~MXC_CSPICTRL_EN). 2. We want to reset the whole SPI block here. So it makes no sense to first read the old value of the CONREG and write it back, later. This will give us the old (historic/random) value of the CONREG back. And doesn't reset the CONREG. To get a clean CONREG after the reset of the block, too, don't use the old (historic/random) value of the CONREG while doing the reset. And read the clean CONREG after the reset. This was found while working on a SPI boot device where the i.MX6 boot ROM has already initialized the SPI block. The initialization by the boot ROM might be different to what the U-Boot driver wants to configure. I.e. we need a clean reset of SPI block, including the CONREG. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
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d3504fee |
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18-Mar-2013 |
Simon Glass <sjg@chromium.org> |
spi: Use spi_alloc_slave() in each SPI driver Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org>
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3cea335c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix spi clock glitch durant reset Measuring the spi clock line on a scope shows a 'glitch' during the reset of the spi. Fix this by toggling only the MXC_CSPICTRL_EN bit, so that the clock line becomes always stable. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
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de5bf02c |
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15-Nov-2012 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Fix handling of chip select In decode_cs() function the polarity of the chip select must be taken into account. Also, for the case of low active chip select, the CS was activated too early. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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784097ae |
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17-Aug-2012 |
Matt Sealey <matt@genesi-usa.com> |
spi: fix mxc_spi_slave structure allocation to clear memory Use calloc() instead of malloc() to allocate the mxc_spi_slave structure. Clearing the memory is necessary since most of the time this gets done super early in boot, but on warm reboots, and when SPI probing is done long after the init stages it could actually pick up previously used memory, and things like the chipselect polarity and other data end up being filled with trash data if not explicitly set by the board files. This solves a semi-random, almost unreproducable error whereby SPI devices act very, very strangly on boot. Tested on Efika MX over several years.. Signed-off-by: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
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cd200403 |
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10-Aug-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
mxc_spi: Round up clock divider Since the input frequency of the API is a maximum that should not be exceeded in order for the devices to operate properly, the SPI clock divider should be rounded up, not truncated. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
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08c61a58 |
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31-Jan-2012 |
Eric Nelson <eric.nelson@boundarydevices.com> |
mxc_spi: move machine specifics into CPU headers Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
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d8e0ca85 |
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21-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: uniform GPIO interface using GPIO framework IMX processors has a slightly different interface to access GPIOs and do not make use of the provided GPIO framework. The patch substitutes mxc_ specific functions and make use of the API in asm/gpio.h Signed-off-by: Stefano Babic <sbabic@denx.de>
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9f008bb4 |
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13-Jul-2011 |
Stefano Babic <sbabic@denx.de> |
MX31: Cleanup clock function The patch provide the same API used with other i.MX processors and get rid of mx31_ functions. Signed-off-by: Stefano Babic <sbabic@denx.de>
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61a58a16 |
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14-Jun-2011 |
Helmut Raiger <helmut.raiger@hale.at> |
mxc_spi.c: typo fixed Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
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86271115 |
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14-Mar-2011 |
Stefano Babic <sbabic@denx.de> |
IMX: MX31: Cleanup include files and drop nasty #ifdef in drivers As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de>
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ac87c17d |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: replace fixed offsets with structures This patch cleans driver code replacing all accesses to registers with fixed offsets with a corresponding structure. Signed-off-by: Stefano Babic <sbabic@denx.de>
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afaa9f65 |
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19-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: add SPI clock calculation and setup to the driver The MXC SPI driver didn't calculate the SPI clock up to now and just used highest possible divider 512 for DATA RATE in the control register. This results in very low transfer rates. The patch adds code to calculate and setup the SPI clock frequency for transfers. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de>
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dff01094 |
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20-Jan-2011 |
Anatolij Gustschin <agust@denx.de> |
SPI: mxc_spi: fix swapping bug and add missing swapping in unaligned rx case We need to shift only one time in each cycle in the swapping loop for unaligned tx case. Currently two byte shift operations are performed in each loop cycle causing zero gaps in the transmited data, so not all data scheduled for transmition is actually transmited. The proper swapping in unaligned rx case is missing, so add it as we need to put the received data into the rx buffer in the correct byte order. Signed-off-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de>
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c9d59c7f |
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19-Jan-2011 |
Stefano Babic <sbabic@denx.de> |
SPI: mxc_spi: add support for i.MX35 processor Signed-off-by: Stefano Babic <sbabic@denx.de>
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2f721d17 |
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19-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51 The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de>
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9f481e95 |
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23-Aug-2010 |
Stefano Babic <sbabic@denx.de> |
MXC: Correct SPI_CPOL setting in SPI driver The handling of the SPI_CPOL bit inside the SPI driver was wrong. As reported by the manual, the meaning of the SSPOL inside the configuration register is the same as reported by SPI specification (0 if low in idle, 1 is high on idle). The driver inverts this logic. Because this patch sets the logic as specified, it is required to clear the CPOL bit in the configuration file to adapt to the correct logic. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: David Jander <david.jander@protonic.nl>
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c4ea1424 |
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06-Jul-2010 |
Stefano Babic <sbabic@denx.de> |
Use common function to set GPIOs for MX3 and MX5 The patch adds support for setting gpios to the MX51 processor and change name to the corresponding functions for MX31. In this way, it is possible to get rid of nasty #ifdef switches related to the processor type. Signed-off-by: Stefano Babic <sbabic@denx.de>
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f91777a3 |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de>
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d205ddcf |
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04-Apr-2010 |
Stefano Babic <sbabic@denx.de> |
SPI: added support for MX51 to mxc_spi This patch add SPI support for the MX51 processor. Signed-off-by: Stefano Babic <sbabic@denx.de>
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eff536be |
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09-Feb-2010 |
Magnus Lilja <lilja.magnus@gmail.com> |
SPI: Fix 32 bit transfers in mxc_spi.c Commit f9b6a1575d9f1ca192e4cb60e547aa66f08baa3f, "i.MX31: fix SPI driver for shorter than 32 bit" broke 32 bit transfers. This patch makes single 32 bit transfer work again. Transfer lengths that are known not to work will abort and print an error message. Tested on i.MX31 Litekit and i.MX31 PDK using 32 bit transfers to the MC13783/ATLAS chip (using the 'date' command). Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
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fc7a93c8 |
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13-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: support GPIO as a chip-select in the mxc_spi driver Some SPI devices have special requirements on chip-select handling. With this patch we can use a GPIO as a chip-select and strictly follow the SPI_XFER_BEGIN and SPI_XFER_END flags. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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f9b6a157 |
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06-Feb-2009 |
Guennadi Liakhovetski <lg@denx.de> |
i.MX31: fix SPI driver for shorter than 32 bit Fix setting the SPI Control register, 8 and 16-bit transfers and a wrong pointer in the free routine in the mxc_spi driver. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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d255bb0e |
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16-May-2008 |
Haavard Skinnemoen <hskinnemoen@atmel.com> |
SPI API improvements This patch gets rid of the spi_chipsel table and adds a handful of new functions that makes the SPI layer cleaner and more flexible. Instead of the spi_chipsel table, each board that wants to use SPI gets to implement three hooks: * spi_cs_activate(): Activates the chipselect for a given slave * spi_cs_deactivate(): Deactivates the chipselect for a given slave * spi_cs_is_valid(): Determines if the given bus/chipselect combination can be activated. Not all drivers may need those extra functions however. If that's the case, the board code may just leave them out (assuming they know what the driver needs) or rely on the linker to strip them out (assuming --gc-sections is being used.) To set up communication parameters for a given slave, the driver needs to call spi_setup_slave(). This returns a pointer to an opaque spi_slave struct which must be passed as a parameter to subsequent SPI calls. This struct can be freed by calling spi_free_slave(), but most driver probably don't want to do this. Before starting one or more SPI transfers, the driver must call spi_claim_bus() to gain exclusive access to the SPI bus and initialize the hardware. When all transfers are done, the driver must call spi_release_bus() to make the bus available to others, and possibly shut down the SPI controller hardware. spi_xfer() behaves mostly the same as before, but it now takes a spi_slave parameter instead of a spi_chipsel function pointer. It also got a new parameter, flags, which is used to specify chip select behaviour. This may be extended with other flags in the future. This patch has been build-tested on all powerpc and arm boards involved. I have not tested NIOS since I don't have a toolchain for it installed, so I expect some breakage there even though I've tried fixing up everything I could find by visual inspection. I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and DataFlash drivers posted as a follow-up. I'd like some help testing other boards that use the existing SPI API. But most of all, I'd like some comments on the new API. Is this stuff usable for everyone? If not, why? Changed in v4: - Build fixes for various boards, drivers and commands - Provide common struct spi_slave definition that can be extended by drivers - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate - Make default bus and mode build-time configurable - Override default SPI bus ID and mode on mx32ads and imx31_litekit. Changed in v3: - Add opaque struct spi_slave for controller-specific data associated with a slave. - Add spi_claim_bus() and spi_release_bus() - Add spi_free_slave() - spi_setup() is now called spi_setup_slave() and returns a struct spi_slave - soft_spi now supports four SPI modes (CPOL|CPHA) - Add bus parameter to spi_setup_slave() - Convert the new i.MX32 SPI driver - Convert the new MC13783 RTC driver Changed in v2: - Convert the mpc8xxx_spi driver and the mpc8349emds board to the new API. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Tested-by: Guennadi Liakhovetski <lg@denx.de>
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53677ef1 |
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20-May-2008 |
Wolfgang Denk <wd@denx.de> |
Big white-space cleanup. This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
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38254f45 |
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15-Apr-2008 |
Guennadi Liakhovetski <lg@denx.de> |
New i.MX31 SPI driver This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far only implemented and tested on i.MX31, can with a modified register layout and definitions be used for i.MX27, I think, MXC CPUs have similar SPI controllers too. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
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