| /u-boot/arch/arm/mach-bcm283x/ |
| H A D | lowlevel_init.S | 11 mov pc, lr
|
| /u-boot/arch/arm/cpu/arm926ejs/sunxi/ |
| H A D | fel_utils.S | 16 str lr, [r0, #4]
17 mrs lr, cpsr @ Read CPSR
18 str lr, [r0, #8]
19 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register
20 str lr, [r0, #12]
26 mov lr, r1
32 bx lr
|
| /u-boot/arch/arm/cpu/armv7/sunxi/ |
| H A D | fel_utils.S | 16 str lr, [r0, #4]
17 mrs lr, cpsr @ Read CPSR
18 str lr, [r0, #8]
19 mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register
20 str lr, [r0, #12]
21 mrc p15, 0, lr, c12, c0, 0 @ Read VBAR
22 str lr, [r0, #16]
28 mov lr, r1
36 bx lr
|
| /u-boot/arch/arm/cpu/arm720t/ |
| H A D | start.S | 52 mov pc, lr
69 mov ip, lr
76 mov lr, ip
78 mov pc, lr
|
| /u-boot/arch/arm/cpu/arm1136/mx31/ |
| H A D | relocate.S | 20 bx lr
|
| /u-boot/arch/arm/lib/ |
| H A D | setjmp.S | 18 stm a1, {v1-v8, ip, lr}
20 ret lr
26 ldm a1, {v1-v8, ip, lr}
34 ret lr
|
| H A D | memset.S | 38 stmfd sp!, {r8, lr}
40 mov lr, r1
43 stmiage ip!, {r1, r3, r8, lr} @ 64 bytes at a time.
44 stmiage ip!, {r1, r3, r8, lr}
45 stmiage ip!, {r1, r3, r8, lr}
46 stmiage ip!, {r1, r3, r8, lr}
53 stmiane ip!, {r1, r3, r8, lr}
54 stmiane ip!, {r1, r3, r8, lr}
56 stmiane ip!, {r1, r3, r8, lr}
57 ldmfd sp!, {r8, lr}
[all...] |
| H A D | semihosting.S | 22 /* Before the ARMv7 exception model, svc (swi) clobbers lr */
23 mov r2, lr
33 bx lr
|
| H A D | bitops.S | 14 ret lr
24 ret lr
33 ret lr
43 ret lr
|
| H A D | crt0.S | 142 adr lr, here
149 add lr, r1
157 add lr, lr, r0
159 orr lr, #1 /* As required by Thumb-only */
197 ldr lr, =board_init_r /* this is auto-relocated! */
198 bx lr
|
| /u-boot/common/spl/ |
| H A D | spl_optee.S | 10 ldr lr, =CONFIG_TEXT_BASE
|
| /u-boot/arch/arm/cpu/armv7m/ |
| H A D | start.S | 16 mov pc, lr
|
| /u-boot/arch/arm/include/asm/arch-sunxi/ |
| H A D | sys_proto.h | 18 * init. It uses the provided lr and sp to do so.
20 * @lr: BROM link register value (return address)
23 void return_to_fel(uint32_t lr, uint32_t sp);
|
| /u-boot/arch/arm/mach-octeontx/ |
| H A D | lowlevel_init.S | 27 mov x29, lr /* Save LR */
31 mov lr, x29 /* Restore LR */
|
| /u-boot/arch/arm/mach-octeontx2/ |
| H A D | lowlevel_init.S | 27 mov x29, lr /* Save LR */
31 mov lr, x29 /* Restore LR */
|
| /u-boot/arch/arm/mach-kirkwood/ |
| H A D | lowlevel.S | 11 bx lr
|
| /u-boot/arch/arm/mach-mvebu/ |
| H A D | lowlevel_spl.S | 10 * BootROM expects executable BIN header code to return to address stored in lr.
16 stmfd sp!, {r0 - r12, lr} /* @ save registers on stack */
25 ldmfd sp!, {r0 - r12, lr} /* @ restore registers from stack */
27 bx lr /* @ return to bootrom */
43 bx lr
61 bx lr
79 bx lr
|
| /u-boot/arch/arm/include/asm/arch-mx7/ |
| H A D | mx7_plugin.S | 14 push {r0-r4, lr}
34 pop {r0-r4, lr}
35 bx lr
70 pop {r0-r4, lr}
82 bx lr
|
| /u-boot/arch/arm/cpu/armv7/s5p4418/ |
| H A D | relocate.S | 22 ret lr
|
| /u-boot/arch/arm/cpu/arm1136/ |
| H A D | start.S | 53 bx lr
89 mov ip, lr /* persevere link reg across call */
91 mov lr, ip /* restore link */
93 mov pc, lr /* back to my caller */
|
| /u-boot/arch/arm/cpu/arm946es/ |
| H A D | start.S | 59 mov pc, lr
96 mov ip, lr /* perserve link reg across call */
98 mov lr, ip /* restore link */
100 mov pc, lr /* back to my caller */
|
| /u-boot/arch/arm/cpu/armv7/ |
| H A D | lowlevel_init.S | 20 bx lr
51 * Save the old lr(passed in ip) and the current lr to stack
53 push {ip, lr}
|
| /u-boot/arch/arm/mach-k3/r5/ |
| H A D | lowlevel_init.S | 15 bx lr
|
| /u-boot/arch/arm/cpu/arm920t/ |
| H A D | start.S | 53 mov pc, lr
92 mov ip, lr
95 mov lr, ip
97 mov pc, lr
|
| /u-boot/arch/arm/cpu/arm926ejs/ |
| H A D | start.S | 66 bx lr
113 mov r4, lr /* perserve link reg across call */
115 mov lr, r4 /* restore link */
117 mov pc, lr /* back to my caller */
|