/u-boot/board/freescale/mx7ulp_evk/ |
H A D | plugin.S | 10 ldr r2, =0x403f0000 11 ldr r3, =0x00000000 14 ldr r2, =0x403e0000 15 ldr r3, =0x01000020 17 ldr r3, =0x01000000 20 ldr r3, =0x80808080 22 ldr r3, =0x00160002 24 ldr r3, =0x00000001 26 ldr r3, =0x00000014 28 ldr r [all...] |
/u-boot/arch/arm/include/asm/arch-imx8/ |
H A D | boot0.h | 17 ldr x0, =reset
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/u-boot/arch/arm/mach-lpc32xx/ |
H A D | lowlevel_init.S | 22 ldr r0, =0x0000003D 23 ldr r1, =0x40004040 27 ldr r0, =0x0001401E 28 ldr r1, =0x40004058 33 ldr r0, [r1] 38 ldr r1, =0x40004044 39 ldr r0, [r1]
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/u-boot/board/freescale/mx6sllevk/ |
H A D | plugin.S | 10 ldr r0, =IOMUXC_BASE_ADDR 11 ldr r1, =0x00080000 13 ldr r1, =0x00000000 15 ldr r1, =0x00000030 19 ldr r1, =0x00020000 21 ldr r1, =0x00003030 27 ldr r1, =0x00020000 29 ldr r1, =0x00000030 39 ldr r1, =0x00082030 42 ldr r [all...] |
/u-boot/board/freescale/mx6ullevk/ |
H A D | plugin.S | 10 ldr r0, =IOMUXC_BASE_ADDR 11 ldr r1, =0x000C0000 13 ldr r1, =0x00000000 15 ldr r1, =0x00000030 17 ldr r1, =0x00000030 21 ldr r1, =0x000C0030 24 ldr r1, =0x00000000 27 ldr r1, =0x00000030 32 ldr r1, =0x00020000 35 ldr r [all...] |
/u-boot/arch/arm/mach-s5pc1xx/ |
H A D | reset.S | 14 ldr r1, =S5PC100_PRO_ID 15 ldr r2, [r1] 16 ldr r4, =0x00010000 21 ldr r1, =S5PC100_SWRESET 22 ldr r2, =0xC100 25 ldr r1, =S5PC110_SWRESET
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/u-boot/arch/arm/mach-kirkwood/ |
H A D | lowlevel.S | 8 ldr r0, =KW_REGS_PHY_BASE 9 ldr r1, =KW_OFFSET_REG
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/u-boot/arch/arm/include/asm/arch-mx7/ |
H A D | mx7_plugin.S | 24 ldr r0, =0x30384680 25 ldr r1, [r0] 29 ldr r0, =0x30B10158 30 ldr r1, [r0] 57 ldr r3, =ROM_VERSION_OFFSET 58 ldr r4, [r3] 59 ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY 60 ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET] 72 ldr r5, boot_data2 74 ldr r [all...] |
/u-boot/arch/arm/mach-aspeed/ast2500/ |
H A D | lowlevel_init.S | 18 ldr r0, =SCU_PROT_KEY 19 ldr r1, =SCU_UNLOCK_VALUE 23 ldr r0, =SCU_VGA_HANDSHAKE 24 ldr r1, [r0] 29 ldr r0, =SCU_HW_STRAP 30 ldr r1, [r0] 37 ldr r0, =WDT3_CTRL
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/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
H A D | lowlevel.S | 34 ldr x0, =GICD_BASE 36 ldr x1, =GICC_BASE 39 ldr x2, =DCFG_CCSR_SVR 40 ldr w2, [x2] 43 ldr w4, =SVR_DEV(SVR_LS1043A) 49 ldr x2, =SCFG_GIC400_ALIGN 50 ldr w2, [x2] 53 ldr x0, =GICD_BASE_64K 55 ldr x1, =GICC_BASE_64K 84 ldr x [all...] |
H A D | ls1043a_psci.S | 16 ldr w0, =0x00010000 /* PSCI v1.0 */
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/u-boot/arch/arm/mach-imx/mx5/ |
H A D | lowlevel_init.S | 32 ldr r0, =0xC0 | /* tag RAM */ \ 39 ldr r3, [r4, #ROM_SI_REV] 62 ldr r0, =AIPS1_BASE_ADDR 63 ldr r1, =0x77777777 66 ldr r0, =AIPS2_BASE_ADDR 82 ldr r0, =M4IF_BASE_ADDR 84 ldr r1, =0x00000203 89 ldr r1, =0x00120125 92 ldr r1, =0x001901A3 99 ldr r [all...] |
/u-boot/board/samsung/smdkc100/ |
H A D | lowlevel_init.S | 25 ldr r8, =S5PC100_GPIO_BASE 28 ldr r0, =S5PC100_WATCHDOG_BASE @0xEA200000 33 ldr r0, =S5PC100_SROMC_BASE 34 ldr r1, =0x9 38 ldr r0, =S5PC100_VIC0_BASE @0xE4000000 39 ldr r1, =S5PC100_VIC1_BASE @0xE4000000 40 ldr r2, =S5PC100_VIC2_BASE @0xE4000000 73 ldr r8, =S5PC100_CLOCK_BASE @ 0xE0100000 76 ldr r1, =0x00011110 78 ldr r [all...] |
/u-boot/arch/arm/mach-socfpga/ |
H A D | lowlevel_init_soc64.S | 18 ldr x4, =CPU_RELEASE_ADDR 19 ldr x5, [x4] 27 ldr x0, =GICD_BASE 31 ldr x0, =GICR_BASE 34 ldr x0, =GICD_BASE 35 ldr x1, =GICC_BASE 50 ldr x0, =GICC_BASE 59 ldr x5, =ES_TO_AARCH64 65 ldr x5, =ES_TO_AARCH64
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/u-boot/arch/arm/lib/ |
H A D | crt0.S | 69 ldr r0, =__bss_start /* this is auto-relocated! */ 72 ldr r3, =__bss_end /* this is auto-relocated! */ 78 ldr r1, =__bss_end /* this is auto-relocated! */ 104 ldr r0, =(CONFIG_TPL_STACK) 106 ldr r0, =(CONFIG_SPL_STACK) 108 ldr r0, =(SYS_INIT_SP_ADDR) 137 ldr r0, [r9, #GD_START_ADDR_SP] /* sp = gd->start_addr_sp */ 140 ldr r9, [r9, #GD_NEW_GD] /* r9 <- gd->new_gd */ 145 ldr r1, _start_ofs 147 ldr r [all...] |
H A D | crt0_64.S | 73 ldr x0, =(CONFIG_TPL_STACK) 75 ldr x0, =(CONFIG_SPL_STACK) 85 ldr x0, =(SYS_INIT_SP_ADDR) 108 ldr x0, [x18, #GD_START_ADDR_SP] /* x0 <- gd->start_addr_sp */ 110 ldr x18, [x18, #GD_NEW_GD] /* x18 <- gd->new_gd */ 113 ldr x0, [x18, #GD_FLAGS] /* x0 <- gd->flags */ 121 ldr x9, _TEXT_BASE /* x9 <- Linked value of _start */ 125 ldr x0, [x18, #GD_ENV_ADDR] /* x0 <- gd->env_addr */ 131 ldr x9, [x18, #GD_RELOC_OFF] /* x9 <- gd->reloc_off */ 133 ldr x [all...] |
/u-boot/board/samsung/goni/ |
H A D | lowlevel_init.S | 30 ldr r7, =S5PC100_GPIO_BASE 31 ldr r8, =S5PC100_GPIO_BASE 33 ldr r2, =S5PC110_PRO_ID 34 ldr r0, [r2] 39 ldr r8, =S5PC110_GPIO_BASE 45 ldr r0, =S5PC110_RST_STAT 46 ldr r1, [r0] 55 ldr r1, [r0, #0x0] @ GPIO_CON_OFFSET 60 ldr r1, [r0, #0x4] @ GPIO_DAT_OFFSET 86 ldr r [all...] |
/u-boot/common/spl/ |
H A D | spl_optee.S | 10 ldr lr, =CONFIG_TEXT_BASE
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/u-boot/board/cortina/presidio-asic/ |
H A D | lowlevel_init.S | 30 ldr x0, =CFG_SYS_TIMER_BASE 37 ldr x0, =GICD_BASE 41 ldr x0, =GICR_BASE 44 ldr x0, =GICD_BASE 45 ldr x1, =GICC_BASE 60 ldr x0, =GICC_BASE 69 ldr x5, =ES_TO_AARCH64 75 ldr x5, =ES_TO_AARCH64
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/u-boot/arch/arm/include/asm/arch-rk3066/ |
H A D | boot0.h | 27 ldr r3, =CONFIG_ROCKCHIP_BOOT_LR_REG 38 ldr r2, =BOOT_BROM_DOWNLOAD 39 ldr r3, =CONFIG_ROCKCHIP_BOOT_MODE_REG 40 ldr r0, [r3] /* if (readl(CONFIG_ROCKCHIP_BOOT_MODE_REG) != */ 47 ldr r3, =CONFIG_ROCKCHIP_BOOT_RETURN_REG 59 ldr r0, =SAVE_SP_ADDR 65 ldr r0, =SAVE_SP_ADDR 66 ldr sp, [r0]
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/u-boot/arch/arm/mach-renesas/ |
H A D | lowlevel_init_gen3.S | 47 ldr x0, =GICD_BASE 54 ldr x0, =GICD_BASE 58 ldr x0, =GICR_BASE 61 ldr x0, =GICD_BASE 62 ldr x1, =GICC_BASE 76 ldr x0, =GICC_BASE 85 ldr x5, =ES_TO_AARCH64 91 ldr x5, =ES_TO_AARCH64
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/u-boot/arch/arm/mach-orion5x/ |
H A D | lowlevel_init.S | 75 ldr r2, =ORION5X_REGS_PHY_BASE 79 ldr r3, =0xD0000000 87 ldr r0, =0x00000001 94 ldr r0, =0x00000030 108 ldr r0, =SDRAM_CONFIG 112 ldr r0, =SDRAM_CONTROL 116 ldr r0, =SDRAM_ADDR_CTRL 120 ldr r0, =SDRAM_BANK0_SIZE 125 ldr r0, =SDRAM_OPEN_PAGE_EN 129 ldr r [all...] |
/u-boot/arch/arm/mach-uniphier/arm32/ |
H A D | debug_ll.S | 25 ldr \ra, =(SG_BASE + SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride) 26 ldr \rd, [\ra] 33 ldr r0, =(SG_BASE + SG_REVISION) 34 ldr r1, [r0] 43 ldr r0, =(SG_BASE + SG_IECTRL) 44 ldr r1, [r0] 50 ldr r3, =DIV_ROUND(UNIPHIER_LD4_UART_CLK, 16 * BAUDRATE) 62 ldr r0, =(SG_BASE + SG_LOADPINCTRL) 66 ldr r0, =(SC_BASE + SC_CLKCTRL) 67 ldr r [all...] |
/u-boot/arch/arm/include/asm/arch-mx7ulp/ |
H A D | mx7ulp_plugin.S | 40 ldr r3, =ROM_VERSION_OFFSET 41 ldr r4, [r3] 42 ldr r3, =ROM_API_TABLE_BASE_ADDR_LEGACY 43 ldr r4, [r3, #ROM_API_HWCNFG_SETUP_OFFSET] 55 ldr r5, boot_data2 57 ldr r5, image_len2 59 ldr r5, second_ivt_offset
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/u-boot/arch/arm/mach-at91/arm926ejs/ |
H A D | lowlevel_init.S | 34 ldr r0, =POS1 /* r0 = POS1 compile */ 38 ldr r0, =SMRDATA 39 ldr r2, =SMRDATA1 44 ldr r1, [r0], #4 46 ldr r3, [r0], #4 57 ldr r1, =(AT91_ASM_PMC_MCKR) 58 ldr r0, [r1] 67 ldr r1, =(AT91_ASM_PMC_MOR) 68 ldr r2, =(AT91_ASM_PMC_SR) 70 ldr r [all...] |