1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * On-chip UART initializaion for low-level debugging
4 *
5 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
6 */
7
8#include <linux/serial_reg.h>
9#include <linux/linkage.h>
10
11#include "../bcu/bcu-regs.h"
12#include "../sc-regs.h"
13#include "../sg-regs.h"
14
15#if !defined(CONFIG_DEBUG_SEMIHOSTING)
16#include CONFIG_DEBUG_LL_INCLUDE
17#endif
18
19#define SG_REVISION_TYPE_SHIFT		16
20#define SG_REVISION_TYPE_MASK		(0xff << SG_REVISION_TYPE_SHIFT)
21#define BAUDRATE		115200
22#define DIV_ROUND(x, d)		(((x) + ((d) / 2)) / (d))
23
24.macro	sg_set_pinsel, pin, muxval, mux_bits, reg_stride, ra, rd
25	ldr	\ra, =(SG_BASE + SG_PINCTRL_BASE + \pin * \mux_bits / 32 * \reg_stride)
26	ldr	\rd, [\ra]
27	and	\rd, \rd, #~(((1 << \mux_bits) - 1) << (\pin * \mux_bits % 32))
28	orr	\rd, \rd, #(\muxval << (\pin * \mux_bits % 32))
29	str	\rd, [\ra]
30.endm
31
32ENTRY(debug_ll_init)
33	ldr		r0, =(SG_BASE + SG_REVISION)
34	ldr		r1, [r0]
35	and		r1, r1, #SG_REVISION_TYPE_MASK
36	mov		r1, r1, lsr #SG_REVISION_TYPE_SHIFT
37
38#if defined(CONFIG_ARCH_UNIPHIER_LD4)
39#define UNIPHIER_LD4_UART_CLK		36864000
40	cmp		r1, #0x26
41	bne		ld4_end
42
43	ldr		r0, =(SG_BASE + SG_IECTRL)
44	ldr		r1, [r0]
45	orr		r1, r1, #1
46	str		r1, [r0]
47
48	sg_set_pinsel	88, 1, 8, 4, r0, r1	@ HSDOUT6 -> TXD0
49
50	ldr		r3, =DIV_ROUND(UNIPHIER_LD4_UART_CLK, 16 * BAUDRATE)
51
52	b		init_uart
53ld4_end:
54#endif
55#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
56#define UNIPHIER_PRO4_UART_CLK		73728000
57	cmp		r1, #0x28
58	bne		pro4_end
59
60	sg_set_pinsel	128, 0, 4, 8, r0, r1	@ TXD0 -> TXD0
61
62	ldr		r0, =(SG_BASE + SG_LOADPINCTRL)
63	mov		r1, #1
64	str		r1, [r0]
65
66	ldr		r0, =(SC_BASE + SC_CLKCTRL)
67	ldr		r1, [r0]
68	orr		r1, r1, #SC_CLKCTRL_CEN_PERI
69	str		r1, [r0]
70
71	ldr		r3, =DIV_ROUND(UNIPHIER_PRO4_UART_CLK, 16 * BAUDRATE)
72
73	b		init_uart
74pro4_end:
75#endif
76#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
77#define UNIPHIER_SLD8_UART_CLK		80000000
78	cmp		r1, #0x29
79	bne		sld8_end
80
81	ldr		r0, =(SG_BASE + SG_IECTRL)
82	ldr		r1, [r0]
83	orr		r1, r1, #1
84	str		r1, [r0]
85
86	sg_set_pinsel	70, 3, 8, 4, r0, r1	@ HSDOUT0 -> TXD0
87
88	ldr		r3, =DIV_ROUND(UNIPHIER_SLD8_UART_CLK, 16 * BAUDRATE)
89
90	b		init_uart
91sld8_end:
92#endif
93#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
94#define UNIPHIER_PRO5_UART_CLK		73728000
95	cmp		r1, #0x2A
96	bne		pro5_end
97
98	sg_set_pinsel	47, 0, 4, 8, r0, r1	@ TXD0 -> TXD0
99	sg_set_pinsel	49, 0, 4, 8, r0, r1	@ TXD1 -> TXD1
100	sg_set_pinsel	51, 0, 4, 8, r0, r1	@ TXD2 -> TXD2
101	sg_set_pinsel	53, 0, 4, 8, r0, r1	@ TXD3 -> TXD3
102
103	ldr		r0, =(SG_BASE + SG_LOADPINCTRL)
104	mov		r1, #1
105	str		r1, [r0]
106
107	ldr		r0, =(SC_BASE + SC_CLKCTRL)
108	ldr		r1, [r0]
109	orr		r1, r1, #SC_CLKCTRL_CEN_PERI
110	str		r1, [r0]
111
112	ldr		r3, =DIV_ROUND(UNIPHIER_PRO5_UART_CLK, 16 * BAUDRATE)
113
114	b		init_uart
115pro5_end:
116#endif
117#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
118#define UNIPHIER_PXS2_UART_CLK		88900000
119	cmp		r1, #0x2E
120	bne		pxs2_end
121
122	ldr		r0, =(SG_BASE + SG_IECTRL)
123	ldr		r1, [r0]
124	orr		r1, r1, #1
125	str		r1, [r0]
126
127	sg_set_pinsel	217, 8, 8, 4, r0, r1	@ TXD0 -> TXD0
128	sg_set_pinsel	115, 8, 8, 4, r0, r1	@ TXD1 -> TXD1
129	sg_set_pinsel	113, 8, 8, 4, r0, r1	@ TXD2 -> TXD2
130	sg_set_pinsel	219, 8, 8, 4, r0, r1	@ TXD3 -> TXD3
131
132	ldr		r0, =(SC_BASE + SC_CLKCTRL)
133	ldr		r1, [r0]
134	orr		r1, r1, #SC_CLKCTRL_CEN_PERI
135	str		r1, [r0]
136
137	ldr		r3, =DIV_ROUND(UNIPHIER_PXS2_UART_CLK, 16 * BAUDRATE)
138
139	b		init_uart
140pxs2_end:
141#endif
142#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
143#define UNIPHIER_LD6B_UART_CLK		88900000
144	cmp		r1, #0x2F
145	bne		ld6b_end
146
147	ldr		r0, =(SG_BASE + SG_IECTRL)
148	ldr		r1, [r0]
149	orr		r1, r1, #1
150	str		r1, [r0]
151
152	sg_set_pinsel	135, 3, 8, 4, r0, r1	@ PORT10 -> TXD0
153	sg_set_pinsel	115, 0, 8, 4, r0, r1	@ TXD1 -> TXD1
154	sg_set_pinsel	113, 2, 8, 4, r0, r1	@ SBO0 -> TXD2
155
156	ldr		r0, =(SC_BASE + SC_CLKCTRL)
157	ldr		r1, [r0]
158	orr		r1, r1, #SC_CLKCTRL_CEN_PERI
159	str		r1, [r0]
160
161	ldr		r3, =DIV_ROUND(UNIPHIER_LD6B_UART_CLK, 16 * BAUDRATE)
162
163	b		init_uart
164ld6b_end:
165#endif
166	mov		pc, lr
167
168init_uart:
169	addruart	r0, r1, r2
170	mov		r1, #UART_LCR_WLEN8 << 8
171	str		r1, [r0, #0x10]
172	str		r3, [r0, #0x24]
173
174	mov		pc, lr
175ENDPROC(debug_ll_init)
176