1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * WORK Microwave work_92105 board low level init
4 *
5 * (C) Copyright 2014  DENX Software Engineering GmbH
6 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
7 *
8 * Low level init is called from SPL to set up the clocks.
9 * On entry, the LPC3250 is in Direct Run mode with all clocks
10 * running at 13 MHz; on exit, ARM clock is 208 MHz, HCLK is
11 * 104 MHz and PCLK is 13 MHz.
12 *
13 * This code must run from SRAM so that the clock changes do
14 * not prevent it from executing.
15 */
16
17.globl lowlevel_init
18
19lowlevel_init:
20
21	/* Set ARM, HCLK, PCLK dividers for normal mode */
22	ldr	r0, =0x0000003D
23	ldr	r1, =0x40004040
24	str	r0, [r1]
25
26	/* Start HCLK PLL for 208 MHz */
27	ldr	r0, =0x0001401E
28	ldr	r1, =0x40004058
29	str	r0, [r1]
30
31	/* wait for HCLK PLL to lock */
321:
33	ldr	r0, [r1]
34	ands	r0, r0, #1
35	beq	1b
36
37	/* switch to normal mode */
38	ldr	r1, =0x40004044
39	ldr	r0, [r1]
40	orr	r0, #0x00000004
41	str	r0, [r1]
42
43	/* Return to U-Boot via saved link register */
44	mov	pc, lr
45