Searched refs:lane_count (Results 1 - 9 of 9) sorted by relevance
/u-boot/drivers/video/tegra124/ |
H A D | dp.c | 432 debug(" lane_count %d\n", 433 link_cfg->lane_count); 458 cfg->lane_count /= 2; 464 if (cfg->lane_count == 1) { 466 cfg->lane_count = cfg->max_lane_count; 468 cfg->lane_count /= 2; 476 return (cfg->lane_count > 0) ? 0 : -ENOLINK; 509 if (!link_rate || !link_cfg->lane_count || !timing->pixelclock.typ || 514 (u64)link_rate * 8 * link_cfg->lane_count) 522 do_div(ratio_f, link_rate * link_cfg->lane_count); 1240 u8 lane_count; local 1312 u8 lane_count; local [all...] |
H A D | sor.c | 216 u32 lane_count, int pu) 224 switch (lane_count) { 235 debug("dp: invalid lane number %d\n", lane_count); 240 tegra_dc_sor_set_lane_count(dev, lane_count); 391 u8 *lane_count) 404 *lane_count = 0; 407 *lane_count = 1; 410 *lane_count = 2; 413 *lane_count = 4; 429 void tegra_dc_sor_set_lane_count(struct udevice *dev, u8 lane_count) argument 215 tegra_dc_sor_power_dplanes(struct udevice *dev, u32 lane_count, int pu) argument 390 tegra_dc_sor_read_link_config(struct udevice *dev, u8 *link_bw, u8 *lane_count) argument [all...] |
H A D | sor.h | 854 u8 lane_count; member in struct:tegra_dp_link_config 884 void tegra_dc_sor_set_lane_count(struct udevice *dev, u8 lane_count); 889 u8 *lane_count);
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/u-boot/drivers/video/ |
H A D | logicore_dp_tx.c | 152 * @lane_count: Currently selected lane count for this link 166 u8 lane_count; member in struct:link_config 716 * @lane_count: The lane count to be checked for validity 720 static bool is_lane_count_valid(struct udevice *dev, u8 lane_count) argument 725 if (lane_count != LANE_COUNT_SET_1 && 726 lane_count != LANE_COUNT_SET_2 && 727 lane_count != LANE_COUNT_SET_4) 729 else if (lane_count > dp_tx->link_config.max_lane_count) 884 * @lane_count: Lane count to set 891 static int set_lane_count(struct udevice *dev, u8 lane_count) argument 1210 check_clock_recovery(struct udevice *dev, u8 lane_count) argument 1255 check_channel_equalization(struct udevice *dev, u8 lane_count) argument 1678 check_link_status(struct udevice *dev, u8 lane_count) argument [all...] |
H A D | logicore_dp_tx_regif.h | 374 * @lane_count: Number of lanes for which to generate a mask 378 static inline u32 phy_status_lanes_ready_mask(u8 lane_count) argument 380 if (lane_count > 2) 383 if (lane_count == 2)
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/u-boot/drivers/video/rockchip/ |
H A D | rk_edp.c | 354 values[1] = edp->link_train.lane_count; 365 for (i = 0; i < edp->link_train.lane_count; i++) 390 static int rk_edp_clock_recovery(const u8 *link_status, int lane_count) argument 395 for (lane = 0; lane < lane_count; lane++) { 404 static int rk_edp_channel_eq(const u8 *link_status, int lane_count) argument 414 for (lane = 0; lane < lane_count; lane++) { 446 static void edp_get_adjust_train(const u8 *link_status, int lane_count, argument 453 for (lane = 0; lane < lane_count; lane++) { 512 edp->link_train.lane_count); 525 edp->link_train.lane_count); [all...] |
/u-boot/drivers/video/zynqmp/ |
H A D | zynqmp_dpsub.c | 820 * @lane_count: Lane count to set 827 static int set_lane_count(struct udevice *dev, u8 lane_count) argument 833 dp_sub->link_config.lane_count = lane_count; 835 writel(dp_sub->link_config.lane_count, 844 regval |= dp_sub->link_config.lane_count; 956 for (index = 0; index < dp_sub->link_config.lane_count; index++) { 1056 * @lane_count: The number of lanes for which to check clock recovery success 1066 static int check_clock_recovery(struct udevice *dev, u8 lane_count) argument 1071 switch (lane_count) { 1275 check_channel_equalization(struct udevice *dev, u8 lane_count) argument 1416 check_link_status(struct udevice *dev, u8 lane_count) argument [all...] |
H A D | zynqmp_dpsub.h | 108 * @lane_count: Currently selected lane count for this link 123 u8 lane_count; member in struct:link_config 291 u8 lane_count; member in struct:zynqmp_dpsub_priv
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/u-boot/arch/arm/include/asm/arch-rockchip/ |
H A D | edp_rk3288.h | 635 u8 lane_count; member in struct:link_train
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