Searched refs:ioaddr (Results 1 - 25 of 49) sorted by relevance

12

/u-boot/drivers/mmc/
H A Dsti_sdhci.c54 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_1);
58 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
60 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
63 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
65 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
68 host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);
121 host->ioaddr = dev_read_addr_ptr(dev);
H A Dtangier_sdhci.c20 void __iomem *ioaddr; member in struct:sdhci_tangier_plat
42 plat->ioaddr = devm_ioremap(dev, base, SZ_1K);
43 if (!plat->ioaddr)
47 host->ioaddr = plat->ioaddr;
H A Dbcm2835_sdhost.c164 void __iomem *ioaddr; member in struct:bcm2835_host
190 dev_dbg(host->dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD));
191 dev_dbg(host->dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG));
192 dev_dbg(host->dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT));
193 dev_dbg(host->dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV));
194 dev_dbg(host->dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0));
195 dev_dbg(host->dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1));
196 dev_dbg(host->dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2));
197 dev_dbg(host->dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3));
198 dev_dbg(host->dev, "SDHSTS 0x%08x\n", readl(host->ioaddr
[all...]
H A Dftsdc010_mci.h22 void *ioaddr; member in struct:ftsdc010_chip
H A Dpic32_sdhci.c39 host->ioaddr = dev_remap_addr(dev);
41 if (!host->ioaddr)
H A Dmsm_sdhci.c169 core_version = readl(host->ioaddr + SDCC_V5_VERSION);
183 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
185 writel(caps, host->ioaddr + var_info->core_vendor_spec_capabilities0);
229 host->ioaddr = dev_read_addr_ptr(dev);
238 if (!host->ioaddr)
H A Dmv_sdhci.c58 host->ioaddr = dev_read_addr_ptr(dev);
73 sdhci_mvebu_mbus_config(host->ioaddr);
H A Datmel_sdhci.c34 host->ioaddr = regbase;
113 host->ioaddr = dev_read_addr_ptr(dev);
H A Dca_dw_mmc.c117 host->ioaddr = dev_read_addr_ptr(dev);
118 if (!host->ioaddr)
H A Dnpcm_sdhci.c29 host->ioaddr = dev_read_addr_ptr(dev);
H A Dbcm2835_sdhci.c90 writel(val, host->ioaddr + reg);
96 return readl(host->ioaddr + reg);
213 host->ioaddr = (void *)(uintptr_t)base;
H A Dnexell_dw_mmc.c89 writel(delay, (host->ioaddr + DWMCI_CLKCTRL));
153 host->ioaddr = dev_read_addr_ptr(dev);
177 debug(" index==%d, name==%s, ioaddr==0x%08x\n",
178 host->dev_index, host->name, (u32)host->ioaddr);
H A Diproc_sdhci.c36 u32 val = readl(host->ioaddr + reg);
65 writel(val, host->ioaddr + reg);
268 host->ioaddr = dev_read_addr_ptr(dev);
/u-boot/drivers/virtio/
H A Dvirtio_pci_legacy.c94 * @ioaddr: pci transport device register base
98 void __iomem *ioaddr; member in struct:virtio_pci_priv
105 void __iomem *ioaddr = priv->ioaddr + VIRTIO_PCI_CONFIG_OFF(false); local
110 ptr[i] = ioread8(ioaddr + offset + i);
119 void __iomem *ioaddr = priv->ioaddr + VIRTIO_PCI_CONFIG_OFF(false); local
124 iowrite8(ptr[i], ioaddr + offset + i);
133 *status = ioread8(priv->ioaddr + VIRTIO_PCI_STATUS);
145 iowrite8(status, priv->ioaddr
[all...]
/u-boot/drivers/net/
H A Drtl8139.c200 unsigned long ioaddr; member in struct:rtl8139_priv
230 inl(priv->ioaddr + RTL_REG_CFG9346);
237 uintptr_t ee_addr = priv->ioaddr + RTL_REG_CFG9346;
286 outl(rtl8139_rx_config | rx_mode, priv->ioaddr + RTL_REG_RXCONFIG);
288 outl(0xffffffff, priv->ioaddr + RTL_REG_MAR0 + 0);
289 outl(0xffffffff, priv->ioaddr + RTL_REG_MAR0 + 4);
297 outb(RTL_REG_CHIPCMD_CMDRESET, priv->ioaddr + RTL_REG_CHIPCMD);
301 reg = inb(priv->ioaddr + RTL_REG_CHIPCMD);
319 outb(priv->enetaddr[i], priv->ioaddr + RTL_REG_MAC0 + i);
323 priv->ioaddr
[all...]
H A Ddc2114x.c170 static int do_read_eeprom(struct dc2114x_priv *priv, u_long ioaddr, int location, argument
177 sendto_srom(priv, SROM_RD | SROM_SR, ioaddr);
178 sendto_srom(priv, SROM_RD | SROM_SR | DT_CS, ioaddr);
187 ioaddr);
190 ioaddr);
193 getfrom_srom(priv, ioaddr) & 15);
195 !!(getfrom_srom(priv, ioaddr) & EE_DATA_READ);
198 sendto_srom(priv, SROM_RD | SROM_SR | DT_CS, ioaddr);
200 debug_cond(SROM_DLEVEL >= 2, " :%X:", getfrom_srom(priv, ioaddr) & 15);
203 sendto_srom(priv, SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr);
227 do_eeprom_cmd(struct dc2114x_priv *priv, u_long ioaddr, int cmd, int cmd_len) argument
262 read_srom(struct dc2114x_priv *priv, u_long ioaddr, int index) argument
[all...]
H A Dpic32_mdio.c104 int pic32_mdio_init(const char *name, ulong ioaddr) argument
118 bus->priv = (void *)ioaddr;
H A Drtl8169.c63 static unsigned long ioaddr; variable
100 #define RTL_W8(reg, val8) writeb((val8), (void *)(ioaddr + (reg)))
101 #define RTL_W16(reg, val16) writew((val16), (void *)(ioaddr + (reg)))
102 #define RTL_W32(reg, val32) writel((val32), (void *)(ioaddr + (reg)))
103 #define RTL_R8(reg) readb((void *)(ioaddr + (reg)))
104 #define RTL_R16(reg) readw((void *)(ioaddr + (reg)))
105 #define RTL_R32(reg) readl((void *)(ioaddr + (reg)))
409 ioaddr = dev_iobase;
539 ioaddr = dev_iobase;
615 ioaddr
[all...]
H A Dpic32_eth.h162 int pic32_mdio_init(const char *name, ulong ioaddr);
/u-boot/drivers/video/meson/
H A Dmeson_dw_hdmi.c75 return readl(hdmi->ioaddr +
79 writel(addr & 0xffff, hdmi->ioaddr + HDMITX_TOP_ADDR_REG);
80 writel(addr & 0xffff, hdmi->ioaddr + HDMITX_TOP_ADDR_REG);
83 data = readl(hdmi->ioaddr + HDMITX_TOP_DATA_REG);
84 data = readl(hdmi->ioaddr + HDMITX_TOP_DATA_REG);
96 writel(data, hdmi->ioaddr +
102 writel(addr & 0xffff, hdmi->ioaddr + HDMITX_TOP_ADDR_REG);
103 writel(addr & 0xffff, hdmi->ioaddr + HDMITX_TOP_ADDR_REG);
106 writel(data, hdmi->ioaddr + HDMITX_TOP_DATA_REG);
126 writel(addr & 0xffff, hdmi->ioaddr
[all...]
/u-boot/include/
H A Ddwmmc.h149 * @ioaddr: Base I/O address of controller
163 void *ioaddr; member in struct:dwmci_host
211 writel(val, host->ioaddr + reg);
216 writew(val, host->ioaddr + reg);
221 writeb(val, host->ioaddr + reg);
225 return readl(host->ioaddr + reg);
230 return readw(host->ioaddr + reg);
235 return readb(host->ioaddr + reg);
H A Dsdhci.h335 void *ioaddr; member in struct:sdhci_host
374 writel(val, host->ioaddr + reg);
382 writew(val, host->ioaddr + reg);
390 writeb(val, host->ioaddr + reg);
398 return readl(host->ioaddr + reg);
406 return readw(host->ioaddr + reg);
414 return readb(host->ioaddr + reg);
421 writel(val, host->ioaddr + reg);
426 writew(val, host->ioaddr + reg);
431 writeb(val, host->ioaddr
[all...]
/u-boot/drivers/misc/
H A Dnpcm_host_intf.c49 u32 ioaddr; local
59 ioaddr = dev_read_u32_default(dev, "ioaddr", 0);
60 if (ioaddr)
61 regmap_write(syscon, HIFCR, ioaddr);
/u-boot/drivers/tpm/
H A Dtpm2_tis_mmio.c86 fdt_addr_t ioaddr; local
89 ioaddr = dev_read_addr(dev);
90 if (ioaddr == FDT_ADDR_T_NONE)
91 return log_msg_ret("ioaddr", -EINVAL);
97 drv_data->iobase = ioremap(ioaddr, sz);
/u-boot/drivers/video/sunxi/
H A Dsunxi_dw_hdmi.c68 (struct sunxi_hdmi_phy *)(hdmi->ioaddr + HDMI_PHY_OFFS);
125 (struct sunxi_hdmi_phy *)(hdmi->ioaddr + HDMI_PHY_OFFS);
302 (struct sunxi_hdmi_phy *)(priv->hdmi.ioaddr + HDMI_PHY_OFFS);
325 (void)readb(priv->hdmi.ioaddr);
380 hdmi->ioaddr = (ulong)dev_read_addr(dev);

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