mmc: sdhci: Correct ADMA_DESC_LEN to 12

Commit 37cb626da25d0d ("mmc: sdhci: Add Support for ADMA2") introduced
ADMA_DESC_LEN == 16 (64 bit case), but it was never used before commit
74755c1fed1b0 ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops").

"sizeof(struct sdhci_adma_desc)" (== 12 for 64bit case) was used instead.

Confusion probably originates from Linux commit 685e444bbaa0
("mmc: sdhci: Add ADMA2 64-bit addressing support for V4 mode"), but
the latter "V4 mode" was never ported to U-Boot.

Fixes: 74755c1fed1b0 ("mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops")
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Tested-by: Jonathan Humphreys <j-humphreys@ti.com>
Tested-by: Judith Mendez <jm@ti.com>

mmc: Support 32-bit only ADMA on 64-bit platforms

Some arm64 platforms may include SDIO host controllers that
only support 32-bit ADMA. While the Linux kernel detects which
size is supported and adjusts the descriptor size used dynamically,
the previous u-boot implementation statically selected between the
two depending on whether DMA_ADDR_T_64BIT was defined. Because the
static selection is already in place and effective for most platforms,
this patch logically separates "64 bit addresses are used for DMA on
this platform" and "64 bit addresses are used by the SDIO host
controller for ADMA" in order to support the small number of platforms
where these statements are not equivalent.

Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Fix potential ADMA descriptor table overflow

Change ADMA_TABLE_NO_ENTRIES to round the division up to fully
contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow
of the ADMA descriptor table.

sdhci_prepare_adma_table() expecitily states it does _not_ check for
overflow as the descriptor table size is dependent on
CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES
calculation does not round up the divison, so with the current u-boot
defaults:
max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) =
65535 * 512 = 33553920 bytes.
ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN =
33553920 / 65532, which does not divide cleanly.
actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 *
65532 = 33552384, which is smaller than max_mmc_transfer.
This can cause sdhci_prepare_adma_table() to write one extra
descriptor, overflowing the table when a transaction larger than
actual_max_transfer is issued.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops

Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.

The above is a port of Linux kernel commit 54552e4948cbf

In addition, allow drivers to allocate their own ADMA descriptor
tables if additional space is required.

Finally, fix the assignment of adma_addr to fix compiler warning
on 64-bit platforms that still use 32-bit DMA addressing.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: Support 32-bit only ADMA on 64-bit platforms

Some arm64 platforms may include SDIO host controllers that
only support 32-bit ADMA. While the Linux kernel detects which
size is supported and adjusts the descriptor size used dynamically,
the previous u-boot implementation statically selected between the
two depending on whether DMA_ADDR_T_64BIT was defined. Because the
static selection is already in place and effective for most platforms,
this patch logically separates "64 bit addresses are used for DMA on
this platform" and "64 bit addresses are used by the SDIO host
controller for ADMA" in order to support the small number of platforms
where these statements are not equivalent.

Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Fix potential ADMA descriptor table overflow

Change ADMA_TABLE_NO_ENTRIES to round the division up to fully
contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow
of the ADMA descriptor table.

sdhci_prepare_adma_table() expecitily states it does _not_ check for
overflow as the descriptor table size is dependent on
CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES
calculation does not round up the divison, so with the current u-boot
defaults:
max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) =
65535 * 512 = 33553920 bytes.
ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN =
33553920 / 65532, which does not divide cleanly.
actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 *
65532 = 33552384, which is smaller than max_mmc_transfer.
This can cause sdhci_prepare_adma_table() to write one extra
descriptor, overflowing the table when a transaction larger than
actual_max_transfer is issued.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops

Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.

The above is a port of Linux kernel commit 54552e4948cbf

In addition, allow drivers to allocate their own ADMA descriptor
tables if additional space is required.

Finally, fix the assignment of adma_addr to fix compiler warning
on 64-bit platforms that still use 32-bit DMA addressing.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: Support 32-bit only ADMA on 64-bit platforms

Some arm64 platforms may include SDIO host controllers that
only support 32-bit ADMA. While the Linux kernel detects which
size is supported and adjusts the descriptor size used dynamically,
the previous u-boot implementation statically selected between the
two depending on whether DMA_ADDR_T_64BIT was defined. Because the
static selection is already in place and effective for most platforms,
this patch logically separates "64 bit addresses are used for DMA on
this platform" and "64 bit addresses are used by the SDIO host
controller for ADMA" in order to support the small number of platforms
where these statements are not equivalent.

Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Fix potential ADMA descriptor table overflow

Change ADMA_TABLE_NO_ENTRIES to round the division up to fully
contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow
of the ADMA descriptor table.

sdhci_prepare_adma_table() expecitily states it does _not_ check for
overflow as the descriptor table size is dependent on
CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES
calculation does not round up the divison, so with the current u-boot
defaults:
max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) =
65535 * 512 = 33553920 bytes.
ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN =
33553920 / 65532, which does not divide cleanly.
actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 *
65532 = 33552384, which is smaller than max_mmc_transfer.
This can cause sdhci_prepare_adma_table() to write one extra
descriptor, overflowing the table when a transaction larger than
actual_max_transfer is issued.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops

Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.

The above is a port of Linux kernel commit 54552e4948cbf

In addition, allow drivers to allocate their own ADMA descriptor
tables if additional space is required.

Finally, fix the assignment of adma_addr to fix compiler warning
on 64-bit platforms that still use 32-bit DMA addressing.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: Support 32-bit only ADMA on 64-bit platforms

Some arm64 platforms may include SDIO host controllers that
only support 32-bit ADMA. While the Linux kernel detects which
size is supported and adjusts the descriptor size used dynamically,
the previous u-boot implementation statically selected between the
two depending on whether DMA_ADDR_T_64BIT was defined. Because the
static selection is already in place and effective for most platforms,
this patch logically separates "64 bit addresses are used for DMA on
this platform" and "64 bit addresses are used by the SDIO host
controller for ADMA" in order to support the small number of platforms
where these statements are not equivalent.

Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Fix potential ADMA descriptor table overflow

Change ADMA_TABLE_NO_ENTRIES to round the division up to fully
contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow
of the ADMA descriptor table.

sdhci_prepare_adma_table() expecitily states it does _not_ check for
overflow as the descriptor table size is dependent on
CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES
calculation does not round up the divison, so with the current u-boot
defaults:
max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) =
65535 * 512 = 33553920 bytes.
ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN =
33553920 / 65532, which does not divide cleanly.
actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 *
65532 = 33552384, which is smaller than max_mmc_transfer.
This can cause sdhci_prepare_adma_table() to write one extra
descriptor, overflowing the table when a transaction larger than
actual_max_transfer is issued.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops

Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.

The above is a port of Linux kernel commit 54552e4948cbf

In addition, allow drivers to allocate their own ADMA descriptor
tables if additional space is required.

Finally, fix the assignment of adma_addr to fix compiler warning
on 64-bit platforms that still use 32-bit DMA addressing.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: Support 32-bit only ADMA on 64-bit platforms

Some arm64 platforms may include SDIO host controllers that
only support 32-bit ADMA. While the Linux kernel detects which
size is supported and adjusts the descriptor size used dynamically,
the previous u-boot implementation statically selected between the
two depending on whether DMA_ADDR_T_64BIT was defined. Because the
static selection is already in place and effective for most platforms,
this patch logically separates "64 bit addresses are used for DMA on
this platform" and "64 bit addresses are used by the SDIO host
controller for ADMA" in order to support the small number of platforms
where these statements are not equivalent.

Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Fix potential ADMA descriptor table overflow

Change ADMA_TABLE_NO_ENTRIES to round the division up to fully
contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow
of the ADMA descriptor table.

sdhci_prepare_adma_table() expecitily states it does _not_ check for
overflow as the descriptor table size is dependent on
CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES
calculation does not round up the divison, so with the current u-boot
defaults:
max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) =
65535 * 512 = 33553920 bytes.
ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN =
33553920 / 65532, which does not divide cleanly.
actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 *
65532 = 33552384, which is smaller than max_mmc_transfer.
This can cause sdhci_prepare_adma_table() to write one extra
descriptor, overflowing the table when a transaction larger than
actual_max_transfer is issued.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops

Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.

The above is a port of Linux kernel commit 54552e4948cbf

In addition, allow drivers to allocate their own ADMA descriptor
tables if additional space is required.

Finally, fix the assignment of adma_addr to fix compiler warning
on 64-bit platforms that still use 32-bit DMA addressing.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: Support 32-bit only ADMA on 64-bit platforms

Some arm64 platforms may include SDIO host controllers that
only support 32-bit ADMA. While the Linux kernel detects which
size is supported and adjusts the descriptor size used dynamically,
the previous u-boot implementation statically selected between the
two depending on whether DMA_ADDR_T_64BIT was defined. Because the
static selection is already in place and effective for most platforms,
this patch logically separates "64 bit addresses are used for DMA on
this platform" and "64 bit addresses are used by the SDIO host
controller for ADMA" in order to support the small number of platforms
where these statements are not equivalent.

Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Fix potential ADMA descriptor table overflow

Change ADMA_TABLE_NO_ENTRIES to round the division up to fully
contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow
of the ADMA descriptor table.

sdhci_prepare_adma_table() expecitily states it does _not_ check for
overflow as the descriptor table size is dependent on
CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES
calculation does not round up the divison, so with the current u-boot
defaults:
max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) =
65535 * 512 = 33553920 bytes.
ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN =
33553920 / 65532, which does not divide cleanly.
actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 *
65532 = 33552384, which is smaller than max_mmc_transfer.
This can cause sdhci_prepare_adma_table() to write one extra
descriptor, overflowing the table when a transaction larger than
actual_max_transfer is issued.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops

Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.

The above is a port of Linux kernel commit 54552e4948cbf

In addition, allow drivers to allocate their own ADMA descriptor
tables if additional space is required.

Finally, fix the assignment of adma_addr to fix compiler warning
on 64-bit platforms that still use 32-bit DMA addressing.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: Support 32-bit only ADMA on 64-bit platforms

Some arm64 platforms may include SDIO host controllers that
only support 32-bit ADMA. While the Linux kernel detects which
size is supported and adjusts the descriptor size used dynamically,
the previous u-boot implementation statically selected between the
two depending on whether DMA_ADDR_T_64BIT was defined. Because the
static selection is already in place and effective for most platforms,
this patch logically separates "64 bit addresses are used for DMA on
this platform" and "64 bit addresses are used by the SDIO host
controller for ADMA" in order to support the small number of platforms
where these statements are not equivalent.

Using 32 bits is opt-in and existing 64 bit platforms should be
unaffected by this change.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Fix potential ADMA descriptor table overflow

Change ADMA_TABLE_NO_ENTRIES to round the division up to fully
contain CONFIG_SYS_MMC_MAX_BLK_COUNT, fixing potential buffer overflow
of the ADMA descriptor table.

sdhci_prepare_adma_table() expecitily states it does _not_ check for
overflow as the descriptor table size is dependent on
CONFIG_SYS_MMC_MAX_BLK_COUNT. However, the ADMA_TABLE_NO_ENTRIES
calculation does not round up the divison, so with the current u-boot
defaults:
max_mmc_transfer = (CONFIG_SYS_MMC_MAX_BLK_COUNT * MMC_MAX_BLOCK_LEN) =
65535 * 512 = 33553920 bytes.
ADMA_TABLE_NO_ENTRIES = max_mmc_transfer / ADMA_MAX_LEN =
33553920 / 65532, which does not divide cleanly.
actual_max_transfer = ADMA_TABLE_NO_ENTRIES * ADMA_MAX_LEN = 512 *
65532 = 33552384, which is smaller than max_mmc_transfer.
This can cause sdhci_prepare_adma_table() to write one extra
descriptor, overflowing the table when a transaction larger than
actual_max_transfer is issued.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: introduce adma_write_desc() hook to struct sdhci_ops

Add this hook so that it can be overridden with driver specific
implementations. We also let the original sdhci_adma_write_desc()
accept &desc so that the function can set its new value. Then export
the function so that it could be reused by driver's specific
implementations.

The above is a port of Linux kernel commit 54552e4948cbf

In addition, allow drivers to allocate their own ADMA descriptor
tables if additional space is required.

Finally, fix the assignment of adma_addr to fix compiler warning
on 64-bit platforms that still use 32-bit DMA addressing.

Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Co-developed-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Greg Malysa <greg.malysa@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

mmc: sdhci: Add helper functions for UHS modes

Add a set_voltage() function which handles the switch from 3.3V to 1.8V
for SD card UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

dm: treewide: Rename dev_get_platdata() to dev_get_plat()

Rename this to be consistent with the change from 'platdata'.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename 'platdata' variables to just 'plat'

We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: treewide: Rename auto_alloc_size members to be shorter

This construct is quite long-winded. In earlier days it made some sense
since auto-allocation was a strange concept. But with driver model now
used pretty universally, we can shorten this to 'auto'. This reduces
verbosity and makes it easier to read.

Coincidentally it also ensures that every declaration is on one line,
thus making dtoc's job easier.

Signed-off-by: Simon Glass <sjg@chromium.org>

Revert "mmc: zynq: parse dt when probing"

This reverts commit 942b5fc03218d1c94468fc658e7dec65dabcc830.

This is partial revert of the above commit.

mmc_of_parse() is reading no-1-8-v from device tree and if set,
it is clearing the UHS speed capabilities of cfg->host_caps.
cfg->host_caps &= ~(UHS_CAPS | MMC_MODE_HS200 |
MMC_MODE_HS400 | MMC_MODE_HS400_ES);

This is still missing to clear UHS speeds like SDHCI_SUPPORT_SDR104,
SDHCI_SUPPORT_SDR50 and SDHCI_SUPPORT_DDR50.

Even if we clear the flags SDHCI_SUPPORT_XXX in mmc_of_parse(),
these speed flags are getting set again in cfg->host_caps in
sdhci_setup_cfg().

The reason for this is, SDHCI_SUPPORT_XXX flags are cleared
only if controller is not capable of supporting MMC_VDD_165_195 volts.

if (caps & SDHCI_CAN_VDD_180)
cfg->voltages |= MMC_VDD_165_195;

if (!(cfg->voltages & MMC_VDD_165_195))
caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
SDHCI_SUPPORT_DDR50);

It means "no-1-8-v", which is read from DT is not coming in to effect.
So it is better we keep the host quirks(SDHCI_QUIRK_NO_1_8_V) to
clear UHS speeds based on no-1-8-v from device tree.

Hence revert the functionality related to no-1-8-v only, rest is fine
in the patch.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

mmc: sdhci: move the ADMA2 table handling into own module

There are other (non-SDHCI) controllers which supports ADMA2 descriptor
tables, namely the Freescale eSDHC. Instead of copying the code, move it
into an own module.

Signed-off-by: Michael Walle <michael@walle.cc>

common: Drop linux/bitops.h from common header

Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: zynq: parse dt when probing

Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes
is not evaluated. This results in the bus width staying at its default
value (4 bit in HS200 mode).
Fix this by calling mmc_of_parse. This function also checks for the
"no-1-8-v" and "max-frequency" entries. Remove the handling of those
nodes from this driver.

Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

sdhci: Add sdhci_deferred_probe() API

Add the sdhci_deferred_probe() function to register as the
deferred_probe() callback to the mmc core. It will in turn call the
deferred_probe() callback of the platform drivers as declared in the
sdhci_ops.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: reduce code duplication for aligned buffer

The same code is run for both SDHCI_QUIRK_32BIT_DMA_ADDR and
define(CONFIG_FIXED_SDHCI_ALIGNED_BUFFER).

Unify the code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: put the aligned buffer pointer to struct sdhci_host

Using the global variable does not look nice.

Add a new field sthci::align_buffer to point to the bounce buffer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings

The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.

Also create a common API to set UHS timings in HOST_CONTROL2.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Make set_ios_post() return int

Make set_ios_post() return int to faciliate error handling in
platform drivers.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Make sdhci_set_clock() non static

The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.

Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

mmc: sdhci: Add Support for ADMA2

The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit widths
of DMA. ADMA2 uses a table of descriptors for aggregating DMA requests.
This significantly improves read and write throughput.

Add Support for the same.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Move DMA handling to prepare_dma() function

In preparation for addition of ADMA2 support, cleanup SDMA handling by
moving it to a new sdhci_prepare_dma() function. Also add a flags field
in sdhci_host to indicate if DMA is enabled.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>

mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B

As noted in commit 3a6383207be ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>

mmc: sdhci: Enable HS400 support if available in caps

HS400 is indicated in bit63 of capability register in few IP's.
Add a quirk to check this and add HS400 to host capabilities.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Check and call config_dll callback functions

Check if the low level driver supports config_dll callback function and
call it if it does. Call with dll disable before calling set_clock and
with dll enable after it.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>

mmc: sdhci: Add new quirks for SUPPORT_SINGLE

This patch defines a quirk to disable the block count
for single block transactions.

This is similar to Linux kernel commit d3fc5d71ac4d
("mmc: sdhci: add a quirk for single block transactions").

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Add HS400 Enhanced Strobe support

Delegate setting the Enhanced Strobe configuration to individual drivers
if they set a function for it. Return -ENOTSUPP if they do not, like
what the MMC uclass does.

Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

doc: replace @return by Return:

Sphinx expects Return: and not @return to indicate a return value.

find . -name '*.c' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

find . -name '*.h' -exec \
sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \;

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>

drivers: mmc: Add wait_dat0 support for sdhci driver

Adds an implementation of the wait_dat0 MMC operation for the DM SDHCI
driver, allowing the driver to continue when the card is ready rather
than waiting for the worst case time on each MMC switch operation.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>

mmc: sdhci: Change prototype of set_delay to return errors

set_delay() has return type as void. If there are any errors while
setting tapdelay's it won't be able to return them.

Change the prototype of set_delay() in sdhci_ops structure and return
the errors from wherever it is called.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>