Searched refs:HIGH (Results 1 - 12 of 12) sorted by relevance

/u-boot/arch/riscv/include/asm/arch-generic/
H A Dgpio.h27 HIGH enumerator in enum:gpio_state
/u-boot/arch/riscv/include/asm/arch-fu540/
H A Dgpio.h27 HIGH enumerator in enum:gpio_state
/u-boot/arch/riscv/include/asm/arch-fu740/
H A Dgpio.h27 HIGH enumerator in enum:gpio_state
/u-boot/arch/arm/mach-sunxi/
H A Ddram_sunxi_dw.c124 MBUS_CONF( GPU, true, HIGH, 0, 1536, 1024, 256);
127 MBUS_CONF( VE, true, HIGH, 0, 1792, 1600, 256);
129 MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64);
132 MBUS_CONF( DI, true, HIGH, 0, 1024, 256, 64);
134 MBUS_CONF(DE_CFD, true, HIGH, 0, 1024, 288, 64);
149 MBUS_CONF( GPU, true, HIGH, 0, 1792, 1536, 0);
151 MBUS_CONF( DMA, true, HIGH, 0, 256, 100, 0);
152 MBUS_CONF( VE, true, HIGH, 0, 2048, 1600, 0);
154 MBUS_CONF( NAND, true, HIGH, 0, 100, 50, 0);
155 MBUS_CONF( SS, true, HIGH,
[all...]
H A Ddram_sun50i_h6.c135 MBUS_CONF( GPU, true, HIGH, 0, 1536, 1400, 256);
137 MBUS_CONF( DMA, true, HIGH, 0, 256, 100, 80);
138 MBUS_CONF( VE, true, HIGH, 2, 8192, 5500, 5000);
139 MBUS_CONF( CE, true, HIGH, 2, 100, 64, 32);
140 MBUS_CONF( TSC0, true, HIGH, 2, 100, 64, 32);
141 MBUS_CONF(NDFC0, true, HIGH, 0, 256, 128, 64);
142 MBUS_CONF( CSI0, true, HIGH, 0, 256, 128, 100);
143 MBUS_CONF( DI0, true, HIGH, 0, 1024, 256, 64);
146 MBUS_CONF( VE2, true, HIGH, 2, 8192, 5500, 5000);
147 MBUS_CONF( USB3, true, HIGH,
[all...]
H A Ddram_sun50i_h616.c72 MBUS_CONF( 1, true, HIGH, 0, 1536, 1400, 256);
74 MBUS_CONF( 3, true, HIGH, 0, 256, 100, 80);
75 MBUS_CONF( 4, true, HIGH, 2, 8192, 5500, 5000);
76 MBUS_CONF( 5, true, HIGH, 2, 100, 64, 32);
77 MBUS_CONF( 6, true, HIGH, 2, 100, 64, 32);
78 MBUS_CONF( 8, true, HIGH, 0, 256, 128, 64);
79 MBUS_CONF(11, true, HIGH, 0, 256, 128, 100);
80 MBUS_CONF(14, true, HIGH, 0, 1024, 256, 64);
84 MBUS_CONF(26, true, HIGH, 2, 8192, 5500, 5000);
85 MBUS_CONF(37, true, HIGH,
[all...]
/u-boot/arch/x86/include/asm/arch-braswell/
H A Dgpio.h60 HIGH, enumerator in enum:gpio_state
189 (((gpio_state) == HIGH) ? 2 : 0)), \
/u-boot/board/intel/cherryhill/
H A Dcherryhill.c76 GPIO_PAD_CONF("N05: GPIO_DFX4", GPIO, M1, GPO, HIGH, NA,
79 GPIO_PAD_CONF("N04: GPIO_DFX5", GPIO, M1, GPO, HIGH, NA,
100 GPIO_PAD_CONF("N22: GPIO_SUS4", GPIO, M1, GPO, HIGH, NA,
103 GPIO_PAD_CONF("N20: GPIO_SUS5", GPIO, M1, GPO, HIGH, NA,
202 GPIO_PAD_CONF("E19: MF_ISH_GPIO_5", GPIO, M1, GPO, HIGH, NA,
208 GPIO_PAD_CONF("E16: MF_ISH_GPIO_7", GPIO, M1, GPO, HIGH, NA,
257 GPIO_PAD_CONF("SE16: SDMMC1_CLK", NATIVE, M1, NA, NA, HIGH,
260 GPIO_PAD_CONF("SE23: SDMMC1_CMD", NATIVE, M1, NA, NA, HIGH,
263 GPIO_PAD_CONF("SE17: SDMMC1_D0", NATIVE, M1, NA, NA, HIGH,
266 GPIO_PAD_CONF("SE24: SDMMC1_D1", NATIVE, M1, NA, NA, HIGH,
[all...]
/u-boot/arch/riscv/include/asm/arch-jh7110/
H A Dgpio.h40 HIGH enumerator in enum:gpio_state
/u-boot/board/starfive/visionfive2/
H A Dspl.c381 SYS_IOMUX_DOEN(36, HIGH);
384 SYS_IOMUX_DOEN(61, HIGH);
387 SYS_IOMUX_DOEN(63, HIGH);
390 SYS_IOMUX_DOEN(60, HIGH);
/u-boot/drivers/gpio/
H A Dsifive-gpio.c101 return val ? HIGH : LOW;
/u-boot/board/nvidia/dalmore/
H A Dpinmux-config-dalmore.h268 DDC_PINMUX(DDC_SCL_PV4, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),
269 DDC_PINMUX(DDC_SDA_PV5, I2C4, NORMAL, NORMAL, INPUT, DEFAULT, HIGH),

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