Searched refs:CR_M (Results 1 - 12 of 12) sorted by relevance
| /u-boot/arch/arm/cpu/armv7/ |
| H A D | mpu_v7r.c | 40 reg &= ~CR_M;
51 reg |= CR_M;
59 return get_cr() & CR_M;
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| /u-boot/arch/arm/mach-mvebu/ |
| H A D | lowlevel.S | 31 bic r0, #CR_M
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| /u-boot/arch/arm/mach-uniphier/arm32/ |
| H A D | psci_smp.S | 16 bic r1, r1, #(CR_C | CR_M) @ Disable MMU and Dcache
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| H A D | lowlevel_init.S | 24 orr r0, r0, #(CR_C | CR_M) @ enable MMU and Dcache
43 bic r0, r0, #(CR_C | CR_M) @ disable MMU and Dcache
75 orr r0, r0, #(CR_C | CR_M) @ MMU and Dcache enable
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| /u-boot/arch/arm/lib/ |
| H A D | cache-cp15.c | 205 set_cr(reg | CR_M);
210 return get_cr() & CR_M;
246 cache_bit |= CR_M;
252 if (cache_bit == (CR_C | CR_M))
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| /u-boot/arch/arm/mach-npcm/npcm8xx/ |
| H A D | cpu.c | 86 if (get_sctlr() & CR_M)
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| /u-boot/arch/arm/include/asm/ |
| H A D | system.h | 12 #define CR_M (1 << 0) /* MMU enable */ macro
318 #define CR_M (1 << 0) /* MMU enable */ macro
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| /u-boot/arch/arm/cpu/armv8/ |
| H A D | cache_v8.c | 478 set_sctlr(get_sctlr() | CR_M);
544 if (!(get_sctlr() & CR_M)) {
575 set_sctlr(sctlr & ~(CR_C|CR_M));
802 return (get_sctlr() & CR_M) != 0;
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| H A D | cache.S | 253 /* Unset CR_M | CR_C | CR_I from SCTLR to disable all caches */
254 movn x1, #(CR_M | CR_C | CR_I)
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| /u-boot/arch/arm/cpu/armv7/ls102xa/ |
| H A D | cpu.c | 207 set_cr(reg | CR_M);
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| /u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | cpu.c | 461 set_sctlr(get_sctlr() | CR_M);
615 set_sctlr(get_sctlr() | CR_M);
630 if (get_sctlr() & CR_M)
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| /u-boot/arch/arm/mach-imx/ |
| H A D | hab.c | 965 if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
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