Searched refs:CFG_SYS_NAND_CSPR (Results 1 - 23 of 23) sorted by relevance

/u-boot/include/configs/
H A Dls1046afrwy.h21 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
51 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
H A Dls1043ardb.h52 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
123 #define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR
133 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
160 #define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR
H A Dls1046ardb.h24 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
79 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
H A Dls1046aqds.h95 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
199 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
217 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
266 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
H A Dls1043aqds.h79 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
183 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
201 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
250 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
H A Dls1088aqds.h70 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
174 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
193 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
230 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
H A Dls2080ardb.h68 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
146 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
166 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
H A Dls2080aqds.h71 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
163 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
194 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
H A Dls1021aqds.h73 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
155 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
204 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
H A DP1010RDB.h167 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
228 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
250 #define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR
H A DT208xRDB.h138 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
170 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
195 #define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR
H A DT102xRDB.h191 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
233 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
258 #define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR
H A DT104xRDB.h159 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
191 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
216 #define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR
H A DT4240RDB.h185 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
217 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
242 #define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR
H A DT208xQDS.h157 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
189 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
230 #define CFG_SYS_CSPR2 CFG_SYS_NAND_CSPR
H A Dls1088ardb.h54 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE_PHYS) \ macro
132 #define CFG_SYS_CSPR0 CFG_SYS_NAND_CSPR
H A Dkmcent2.h225 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE) | \ macro
257 #define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR
/u-boot/include/configs/km/
H A Dpg-wcom-ls102xa.h79 #define CFG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CFG_SYS_NAND_BASE) | \ macro
109 #define CFG_SYS_CSPR1 CFG_SYS_NAND_CSPR
/u-boot/board/freescale/ls1043ardb/
H A Dls1043ardb.c48 CFG_SYS_NAND_CSPR,
77 CFG_SYS_NAND_CSPR,
/u-boot/board/freescale/ls1046aqds/
H A Dls1046aqds.c70 CFG_SYS_NAND_CSPR,
99 CFG_SYS_NAND_CSPR,
/u-boot/board/freescale/ls1043aqds/
H A Dls1043aqds.c86 CFG_SYS_NAND_CSPR,
115 CFG_SYS_NAND_CSPR,
/u-boot/drivers/mtd/nand/raw/
H A Dfsl_ifc_spl.c135 cspr = CFG_SYS_NAND_CSPR;
/u-boot/board/freescale/ls1088a/
H A Dls1088a.c75 CFG_SYS_NAND_CSPR,
107 CFG_SYS_NAND_CSPR,

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