/u-boot/board/cei/cei-tk1-som/ |
H A D | cei-tk1-som.c | 24 ARRAY_SIZE(cei_tk1_som_gpio_inits)); 27 ARRAY_SIZE(cei_tk1_som_pingrps)); 30 ARRAY_SIZE(cei_tk1_som_drvgrps)); 33 ARRAY_SIZE(cei_tk1_som_mipipadctrlgrps));
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/u-boot/drivers/pinctrl/aspeed/ |
H A D | pinctrl_ast2600.c | 459 { "MAC1LINK", ARRAY_SIZE(mac1_link), mac1_link }, 460 { "MAC2LINK", ARRAY_SIZE(mac2_link), mac2_link }, 461 { "MAC3LINK", ARRAY_SIZE(mac3_link), mac3_link }, 462 { "MAC4LINK", ARRAY_SIZE(mac4_link), mac4_link }, 463 { "RGMII1", ARRAY_SIZE(rgmii1), rgmii1 }, 464 { "RGMII2", ARRAY_SIZE(rgmii2), rgmii2 }, 465 { "RGMII3", ARRAY_SIZE(rgmii3), rgmii3 }, 466 { "RGMII4", ARRAY_SIZE(rgmii4), rgmii4 }, 467 { "RMII1", ARRAY_SIZE(rmii1), rmii1 }, 468 { "RMII2", ARRAY_SIZE(rmii [all...] |
/u-boot/board/nvidia/venice2/ |
H A D | venice2.c | 21 ARRAY_SIZE(venice2_gpio_inits)); 24 ARRAY_SIZE(venice2_pingrps)); 27 ARRAY_SIZE(venice2_drvgrps));
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/u-boot/drivers/clk/sifive/ |
H A D | fu540-prci.h | 19 .num_clks = ARRAY_SIZE(__prci_init_clocks_fu540),
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H A D | fu740-prci.h | 19 .num_clks = ARRAY_SIZE(__prci_init_clocks_fu740),
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/u-boot/arch/arm/mach-socfpga/ |
H A D | wrap_pinmux_config.c | 15 *table_len = ARRAY_SIZE(sys_mgr_init_table);
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/u-boot/board/freescale/mpc8548cds/ |
H A D | law.c | 18 int num_law_entries = ARRAY_SIZE(law_table);
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/u-boot/arch/powerpc/cpu/mpc85xx/ |
H A D | p2041_ids.c | 30 int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); 60 int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); 73 int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); 88 int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); 98 int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
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H A D | p4080_ids.c | 30 int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); 53 int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); 63 int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); 73 int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl); 98 int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
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H A D | p3041_ids.c | 30 int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl); 61 int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); 72 int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); 87 int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); 97 int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
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H A D | p5040_ids.c | 47 int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); 58 int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); 69 int fman2_liodn_tbl_sz = ARRAY_SIZE(fman2_liodn_tbl); 87 int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl); 96 int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl);
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H A D | t1024_ids.c | 49 int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl); 58 int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl); 73 int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
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/u-boot/drivers/pinctrl/exynos/ |
H A D | pinctrl-exynos850.c | 87 .nr_banks = ARRAY_SIZE(exynos850_pin_banks0), 91 .nr_banks = ARRAY_SIZE(exynos850_pin_banks1), 95 .nr_banks = ARRAY_SIZE(exynos850_pin_banks2), 99 .nr_banks = ARRAY_SIZE(exynos850_pin_banks3), 103 .nr_banks = ARRAY_SIZE(exynos850_pin_banks4), 107 .nr_banks = ARRAY_SIZE(exynos850_pin_banks5),
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H A D | pinctrl-exynos78x0.c | 85 .nr_banks = ARRAY_SIZE(exynos78x0_pin_banks0), 89 .nr_banks = ARRAY_SIZE(exynos78x0_pin_banks1), 93 .nr_banks = ARRAY_SIZE(exynos78x0_pin_banks2), 97 .nr_banks = ARRAY_SIZE(exynos78x0_pin_banks4), 101 .nr_banks = ARRAY_SIZE(exynos78x0_pin_banks6),
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/u-boot/drivers/clk/imx/ |
H A D | clk-imxrt1050.c | 41 pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); 44 pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); 47 pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); 50 pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); 70 ARRAY_SIZE(pll1_bypass_sels), 75 ARRAY_SIZE(pll2_bypass_sels), 80 ARRAY_SIZE(pll3_bypass_sels), 85 ARRAY_SIZE(pll5_bypass_sels), 122 pre_periph_sels, ARRAY_SIZE(pre_periph_sels))); 125 periph_sels, ARRAY_SIZE(periph_sel [all...] |
/u-boot/board/openpiton/riscv64/ |
H A D | openpiton-riscv64.c | 25 for (i = 0; i < ARRAY_SIZE(boot_devices); i++)
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/u-boot/board/socrates/ |
H A D | law.c | 41 int num_law_entries = ARRAY_SIZE(law_table);
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/u-boot/board/nvidia/jetson-tk1/ |
H A D | jetson-tk1.c | 28 ARRAY_SIZE(jetson_tk1_gpio_inits)); 31 ARRAY_SIZE(jetson_tk1_pingrps)); 34 ARRAY_SIZE(jetson_tk1_drvgrps)); 37 ARRAY_SIZE(jetson_tk1_mipipadctrlgrps));
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/u-boot/board/nvidia/dalmore/ |
H A D | dalmore.c | 24 ARRAY_SIZE(tegra114_pinmux_set_nontristate)); 27 ARRAY_SIZE(tegra114_pinmux_common)); 30 ARRAY_SIZE(unused_pins_lowpower)); 34 ARRAY_SIZE(dalmore_padctrl));
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/u-boot/board/coreboot/coreboot/ |
H A D | coreboot.c | 38 ARRAY_SIZE(coreboot_splash_locations));
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/u-boot/board/freescale/p1010rdb/ |
H A D | law.c | 16 int num_law_entries = ARRAY_SIZE(law_table);
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/u-boot/board/freescale/p1_p2_rdb_pc/ |
H A D | law.c | 21 int num_law_entries = ARRAY_SIZE(law_table);
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/u-boot/test/dm/ |
H A D | axi.c | 56 memcpy(data, tdata1, ARRAY_SIZE(tdata1)); 60 memcpy(data + 3, tdata2, ARRAY_SIZE(tdata2)); 70 ut_asserteq_mem(data, tdata1, ARRAY_SIZE(tdata1)); 74 ut_asserteq_mem(data + 3, tdata2, ARRAY_SIZE(tdata1));
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/u-boot/drivers/pinctrl/uniphier/ |
H A D | pinctrl-uniphier.h | 121 .num_pins = ARRAY_SIZE(grp##_pins), \ 123 BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \ 124 ARRAY_SIZE(grp##_muxvals)), \ 135 { .num_pins = ARRAY_SIZE(grp##_pins) + ARRAY_SIZE(grp##_muxvals) }
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/u-boot/drivers/clk/exynos/ |
H A D | clk-exynos850.c | 226 { S_CLK_PLL, top_pure_pll_clks, ARRAY_SIZE(top_pure_pll_clks) }, 227 { S_CLK_MUX, top_pure_mux_clks, ARRAY_SIZE(top_pure_mux_clks) }, 228 { S_CLK_DIV, top_pure_div_clks, ARRAY_SIZE(top_pure_div_clks) }, 231 { S_CLK_MUX, top_core_mux_clks, ARRAY_SIZE(top_core_mux_clks) }, 232 { S_CLK_GATE, top_core_gate_clks, ARRAY_SIZE(top_core_gate_clks) }, 233 { S_CLK_DIV, top_core_div_clks, ARRAY_SIZE(top_core_div_clks) }, 236 { S_CLK_MUX, top_hsi_mux_clks, ARRAY_SIZE(top_hsi_mux_clks) }, 237 { S_CLK_GATE, top_hsi_gate_clks, ARRAY_SIZE(top_hsi_gate_clks) }, 238 { S_CLK_DIV, top_hsi_div_clks, ARRAY_SIZE(top_hsi_div_clks) }, 241 { S_CLK_MUX, top_peri_mux_clks, ARRAY_SIZE(top_peri_mux_clk [all...] |