#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
92bb2cd4 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
clk: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
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#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
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#
45a5f76c |
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20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
f544dfec |
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12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
ea0f768e |
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27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
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#
ecd8497b |
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08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
caac71b7 |
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08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
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#
d303f9c3 |
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08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
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#
4ca28e98 |
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10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
92bb2cd4 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
clk: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
a2d6fbf5 |
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17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
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#
682e73d2 |
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20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
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#
45a5f76c |
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20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
f544dfec |
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12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
ea0f768e |
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27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
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#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
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#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
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#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
92bb2cd4 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
clk: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
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20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
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#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
92bb2cd4 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
clk: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
92bb2cd4 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
clk: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
92bb2cd4 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
clk: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
92bb2cd4 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
clk: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
a2d6fbf5 |
|
17-Mar-2022 |
Jesse Taube <mr.bossman075@gmail.com> |
clk: imxrt: Use dts for anatop base address In Linux IMX and IMXRT use the device tree to hold the anatop address. The anatop is used in clock drivers as it controls the internal PLLs This will move the macro from asm/arch-imxrt to the device tree. This presumably should also be done with the other IMX boards as well. Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
682e73d2 |
|
20-Mar-2022 |
Sean Anderson <seanga2@gmail.com> |
clk: Use generic CCF ops where possible This converts most CCF drivers to use generic ops. imx6q is the only outlier, where we retain the existing functionality by moving the check to request(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com [ fixed missing include for at91 ] Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
45a5f76c |
|
20-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce IMXRT1050_CLK_USBOH3 Usb needs IMXRT1050_CLK_USBOH3 clock to be enabled, so let's add it to clock driver. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f544dfec |
|
12-May-2021 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: introduce LCDIF_PIX and rename LCDIF to LCDIF_APB Lcd peripheral needs 2 different gates to be enable to work, so let's introduce the missing one(LCDIF_PIX) and rename the existing one (LCDIF_APB). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ea0f768e |
|
27-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix lcdif clock gate LCDIF clock gate was wrong so set it according to RM. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
ecd8497b |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: add set_parent() callback Need to add set_parent() callback to allow dts assigned-clock-parents to work so let's add it accordingly. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
caac71b7 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL mxsfb needs PLL5 as source, so let's setup it at its default frequency specified in RM(650Mhz). Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
d303f9c3 |
|
08-Apr-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: clk-imxrt1050: fix typo in clock name "video:" "video:" must be "video", ":" is a typo. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|
#
4ca28e98 |
|
10-Jan-2020 |
Giulio Benetti <giulio.benetti@benettiengineering.com> |
clk: imx: add i.IMXRT1050 clk driver Add i.MXRT1050 clk driver support. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
|