/openjdk10/hotspot/src/cpu/ppc/vm/ |
H A D | methodHandles_ppc.hpp | 36 static void load_klass_from_Class(MacroAssembler* _masm, Register klass_reg, Register temp_reg, Register temp2_reg); 40 Register temp_reg, Register temp2_reg, 44 Register temp_reg, Register temp2_reg) { 46 temp_reg, temp2_reg, 43 verify_method_handle(MacroAssembler* _masm, Register mh_reg, Register temp_reg, Register temp2_reg) argument
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H A D | c1_MacroAssembler_ppc.cpp | 43 const Register temp_reg = R12_scratch2; local 45 load_klass(temp_reg, receiver); 47 trap_ic_miss_check(temp_reg, iCache); 50 cmpd(CCR0, temp_reg, iCache); 52 //load_const_optimized(temp_reg, SharedRuntime::get_ic_miss_stub(), R0); 53 calculate_address_from_global_toc(temp_reg, SharedRuntime::get_ic_miss_stub(), true, true, false); 54 mtctr(temp_reg);
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H A D | methodHandles_ppc.cpp | 51 Register temp_reg, Register temp2_reg) { 54 temp_reg, temp2_reg, "MH argument is a Class"); 72 Register temp_reg, Register temp2_reg, 81 __ load_klass(temp_reg, obj_reg); 84 __ cmpd(CCR0, temp_reg, temp2_reg); 86 __ ld(temp_reg, klass->super_check_offset(), temp_reg); 87 __ cmpd(CCR0, temp_reg, temp2_reg); 50 load_klass_from_Class(MacroAssembler* _masm, Register klass_reg, Register temp_reg, Register temp2_reg) argument 70 verify_klass(MacroAssembler* _masm, Register obj_reg, SystemDictionary::WKID klass_id, Register temp_reg, Register temp2_reg, const char* error_message) argument
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H A D | macroAssembler_ppc.cpp | 2043 Register temp_reg, 2045 assert_different_registers(mtype_reg, mh_reg, temp_reg); 2047 load_heap_oop_not_null(temp_reg, delayed_value(java_lang_invoke_MethodHandle::type_offset_in_bytes, temp_reg), mh_reg); 2048 cmpd(CCR0, temp_reg, mtype_reg); 2053 Register temp_reg, 2062 assert(temp_reg != noreg, "must specify"); 2063 sldi(temp_reg, arg_slot.as_register(), exact_log2(stackElementSize)); 2065 addi(temp_reg, temp_reg, offse 2042 check_method_handle_type(Register mtype_reg, Register mh_reg, Register temp_reg, Label& wrong_method_type) argument 2052 argument_offset(RegisterOrConstant arg_slot, Register temp_reg, int extra_slot_offset) argument 2071 biased_locking_enter(ConditionRegister cr_reg, Register obj_reg, Register mark_reg, Register temp_reg, Register temp2_reg, Label& done, Label* slow_case) argument 2267 biased_locking_exit(ConditionRegister cr_reg, Register mark_addr, Register temp_reg, Label& done) argument [all...] |
H A D | macroAssembler_ppc.inline.hpp | 289 inline void MacroAssembler::null_check_throw(Register a, int offset, Register temp_reg, argument 299 load_const_optimized(temp_reg, exception_entry); 300 mtctr(temp_reg);
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H A D | macroAssembler_ppc.hpp | 519 Register temp_reg, Register temp2_reg, 532 // No registers are killed, except temp_reg and temp2_reg. 545 // The temp_reg can be noreg, if no temps are available. 564 void check_method_handle_type(Register mtype_reg, Register mh_reg, Register temp_reg, Label& wrong_method_type); 566 RegisterOrConstant argument_offset(RegisterOrConstant arg_slot, Register temp_reg, int extra_slot_offset = 0); 577 void biased_locking_enter(ConditionRegister cr_reg, Register obj_reg, Register mark_reg, Register temp_reg, 580 // Destroys temp_reg. 584 void biased_locking_exit(ConditionRegister cr_reg, Register mark_addr, Register temp_reg, Label& done); 699 inline void null_check_throw(Register a, int offset, Register temp_reg, address exception_entry);
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H A D | interp_masm_ppc.hpp | 40 void null_check_throw(Register a, int offset, Register temp_reg);
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/openjdk10/hotspot/src/cpu/sparc/vm/ |
H A D | methodHandles_sparc.hpp | 35 static void load_klass_from_Class(MacroAssembler* _masm, Register klass_reg, Register temp_reg, Register temp2_reg); 39 Register temp_reg, Register temp2_reg, 43 Register temp_reg, Register temp2_reg) { 45 temp_reg, temp2_reg, 42 verify_method_handle(MacroAssembler* _masm, Register mh_reg, Register temp_reg, Register temp2_reg) argument
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H A D | methodHandles_sparc.cpp | 52 void MethodHandles::load_klass_from_Class(MacroAssembler* _masm, Register klass_reg, Register temp_reg, Register temp2_reg) { argument 54 verify_klass(_masm, klass_reg, SystemDictionary::WK_KLASS_ENUM_NAME(java_lang_Class), temp_reg, temp2_reg, 72 Register temp_reg, Register temp2_reg, 77 if (temp_reg == noreg || temp2_reg == noreg) { 78 temp_reg = L1; 88 __ load_klass(obj_reg, temp_reg); 91 __ cmp_and_brx_short(temp_reg, temp2_reg, Assembler::equal, Assembler::pt, L_ok); 93 __ ld_ptr(Address(temp_reg, super_check_offset), temp_reg); local 96 __ cmp_and_brx_short(temp_reg, temp2_re 70 verify_klass(MacroAssembler* _masm, Register obj_reg, SystemDictionary::WKID klass_id, Register temp_reg, Register temp2_reg, const char* error_message) argument [all...] |
H A D | macroAssembler_sparc.cpp | 2153 Register temp_reg, 2161 if (temp_reg == noreg || temp2_reg == noreg) { 2162 temp_reg = L2; 2171 temp_reg, temp2_reg, 2195 Register temp_reg, 2208 assert_different_registers(sub_klass, super_klass, temp_reg); 2210 assert_different_registers(sub_klass, super_klass, temp_reg, 2242 assert_different_registers(sub_klass, super_klass, temp_reg, super_check_offset.as_register()); 2244 ld_ptr(sub_klass, super_check_offset, temp_reg); 2245 cmp(super_klass, temp_reg); 2151 check_klass_subtype(Register sub_klass, Register super_klass, Register temp_reg, Register temp2_reg, Label& L_success) argument 2193 check_klass_subtype_fast_path(Register sub_klass, Register super_klass, Register temp_reg, Register temp2_reg, Label* L_success, Label* L_failure, Label* L_slow_path, RegisterOrConstant super_check_offset) argument 2378 argument_offset(RegisterOrConstant arg_slot, Register temp_reg, int extra_slot_offset) argument 2397 argument_address(RegisterOrConstant arg_slot, Register temp_reg, int extra_slot_offset) argument 2404 biased_locking_enter(Register obj_reg, Register mark_reg, Register temp_reg, Label& done, Label* slow_case, BiasedLockingCounters* counters) argument 2428 ld_ptr(Address(temp_reg, Klass::prototype_header_offset()), temp_reg); local 2505 ld_ptr(Address(temp_reg, Klass::prototype_header_offset()), temp_reg); local 2535 ld_ptr(Address(temp_reg, Klass::prototype_header_offset()), temp_reg); local 2548 biased_locking_exit(Address mark_addr, Register temp_reg, Label& done, bool allow_delay_slot_filling) argument [all...] |
H A D | interp_masm_sparc.cpp | 1167 Register temp_reg = G1_scratch; local 1174 assert_different_registers(lock_reg, obj_reg, mark_reg, temp_reg); 1180 biased_locking_enter(obj_reg, mark_reg, temp_reg, done, &slow_case); 1186 mov(lock_reg, temp_reg); 1193 cas_ptr(mark_addr.base(), mark_reg, temp_reg); 1196 cmp_and_brx_short(mark_reg, temp_reg, Assembler::equal, Assembler::pt, done); 1202 sub(temp_reg, SP, temp_reg); 1203 sub(temp_reg, STACK_BIAS, temp_reg); 1335 Register temp_reg = O5; local 2559 Register temp_reg = O5; local 2568 Register temp_reg = O5; local 2608 Register temp_reg = O5; local 2627 Register temp_reg = O5; local [all...] |
H A D | c1_MacroAssembler_sparc.cpp | 41 const Register temp_reg = G3_scratch; local 44 load_klass(receiver, temp_reg); 45 cmp_and_brx_short(temp_reg, iCache, Assembler::equal, Assembler::pt, L); 47 jump_to(ic_miss, temp_reg);
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H A D | macroAssembler_sparc.hpp | 1237 void biased_locking_enter(Register obj_reg, Register mark_reg, Register temp_reg, 1241 // Destroys temp_reg. 1246 void biased_locking_exit(Address mark_addr, Register temp_reg, Label& done, bool allow_delay_slot_filling = false); 1274 Register temp_reg, Register temp2_reg, 1287 // No registers are killed, except temp_reg and temp2_reg. 1291 Register temp_reg, 1300 // The temp_reg can be noreg, if no temps are available. 1305 Register temp_reg, 1316 Register temp_reg, 1324 Register temp_reg, [all...] |
H A D | sharedRuntime_sparc.cpp | 602 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg, Register temp2_reg, argument 606 __ set(ExternalAddress(code_start), temp_reg); local 608 __ cmp(pc_reg, temp_reg); 610 __ delayed()->add(temp_reg, temp2_reg, temp_reg); 611 __ cmp(pc_reg, temp_reg); 612 __ cmp_and_brx_short(pc_reg, temp_reg, Assembler::lessUnsigned, Assembler::pt, L_ok); 1639 Register temp_reg = G5_method; // not part of any compiled calling seq local 1648 ld_off = __ ensure_simm13_or_reg(ld_off, temp_reg); 1649 __ ld_ptr(SP, ld_off, temp_reg); 1797 const Register temp_reg = G3_scratch; local [all...] |
/openjdk10/hotspot/src/cpu/s390/vm/ |
H A D | methodHandles_s390.hpp | 36 static void load_klass_from_Class(MacroAssembler* _masm, Register klass_reg, Register temp_reg, Register temp2_reg); 40 Register temp_reg, Register temp2_reg, 44 Register temp_reg, Register temp2_reg) { 46 temp_reg, temp2_reg, 43 verify_method_handle(MacroAssembler* _masm, Register mh_reg, Register temp_reg, Register temp2_reg) argument
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H A D | methodHandles_s390.cpp | 51 Register temp_reg, Register temp2_reg) { 54 temp_reg, temp2_reg, "MH argument is a Class"); 73 Register temp_reg, Register temp2_reg, 79 assert(temp_reg != Z_R0 && // Is used as base register! 80 temp_reg != noreg && temp2_reg != noreg, "need valid registers!"); 88 __ load_klass(temp_reg, obj_reg); 92 __ compareU64_and_branch(temp_reg, temp2_reg, Assembler::bcondEqual, L_ok); 95 __ z_lg(temp_reg, Address(temp_reg, super_check_offset)); 96 __ compareU64_and_branch(temp_reg, temp2_re 50 load_klass_from_Class(MacroAssembler* _masm, Register klass_reg, Register temp_reg, Register temp2_reg) argument 71 verify_klass(MacroAssembler* _masm, Register obj_reg, SystemDictionary::WKID klass_id, Register temp_reg, Register temp2_reg, const char* error_message) argument [all...] |
H A D | macroAssembler_s390.cpp | 1097 Register temp_reg, 1109 assert(temp_reg != noreg, "must specify"); 1110 assert(temp_reg != Z_ARG1, "base and index are conflicting"); 1111 z_sllg(temp_reg, arg_slot.as_register(), exact_log2(stackElementSize)); // tempreg = arg_slot << 3 1112 return Address(argbase, temp_reg, offset); 3160 Register temp_reg, 3165 assert_different_registers(obj_reg, mark_reg, temp_reg, temp2_reg); 3178 z_lr(temp_reg, mark_reg); 3179 z_nilf(temp_reg, markOopDesc::biased_lock_mask_in_place); 3180 z_chi(temp_reg, markOopDes [all...] |
H A D | macroAssembler_s390.hpp | 269 // If temp_reg == arg_slot, arg_slot will be overwritten. 271 Register temp_reg = noreg, 686 // No registers are killed, except temp_reg and temp2_reg. 698 // The temp_reg can be noreg, if no temps are available. 728 void biased_locking_enter(Register obj_reg, Register mark_reg, Register temp_reg, 731 // Destroys temp_reg. 735 void biased_locking_exit(Register mark_addr, Register temp_reg, Label& done);
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/openjdk10/hotspot/src/cpu/arm/vm/ |
H A D | templateTable_arm.cpp | 264 Register temp_reg, bool load_bc_into_bc_reg/*=true*/, 266 assert_different_registers(bc_reg, temp_reg); 288 __ get_cache_and_index_and_bytecode_at_bcp(bc_reg, temp_reg, temp_reg, byte_no, 1, sizeof(u2)); 290 __ cbz(temp_reg, L_patch_done); // test if bytecode is zero 304 __ ldrb(temp_reg, at_bcp(0)); 305 __ cmp(temp_reg, Bytecodes::_breakpoint); 320 __ ldrb(temp_reg, at_bcp(0)); 321 __ cmp(temp_reg, (int)Bytecodes::java_code(bc)); 323 __ cmp(temp_reg, bc_re 263 patch_bytecode(Bytecodes::Code bc, Register bc_reg, Register temp_reg, bool load_bc_into_bc_reg , int byte_no) argument 2981 const Register temp_reg = Rtemp; local [all...] |
H A D | macroAssembler_arm.cpp | 131 Register temp_reg, 136 check_klass_subtype_fast_path(sub_klass, super_klass, temp_reg, temp_reg2, &L_success, &L_failure, NULL); 137 check_klass_subtype_slow_path(sub_klass, super_klass, temp_reg, temp_reg2, temp_reg3, &L_success, NULL); 143 Register temp_reg, 149 assert_different_registers(sub_klass, super_klass, temp_reg, temp_reg2, noreg); 177 ldr(temp_reg, super_check_addr); 178 cmp(super_klass, temp_reg); // load displayed supertype 208 Register temp_reg, 218 // this register must be temp_reg and set_cond_codes must be true 229 assert_different_registers(sub_klass, super_klass, temp_reg, temp2_re 129 check_klass_subtype(Register sub_klass, Register super_klass, Register temp_reg, Register temp_reg2, Register temp_reg3, Label& L_success) argument 141 check_klass_subtype_fast_path(Register sub_klass, Register super_klass, Register temp_reg, Register temp_reg2, Label* L_success, Label* L_failure, Label* L_slow_path) argument 206 check_klass_subtype_slow_path(Register sub_klass, Register super_klass, Register temp_reg, Register temp2_reg, Register temp3_reg, Label* L_success, Label* L_failure, bool set_cond_codes) argument [all...] |
H A D | macroAssembler_arm.hpp | 306 Register temp_reg, 318 // - temp_reg will be 0 on success, non-0 on failure 321 Register temp_reg, 333 Register temp_reg, 397 void biased_locking_exit(Register obj_reg, Register temp_reg, Label& done);
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/openjdk10/hotspot/src/share/vm/interpreter/ |
H A D | templateTable.hpp | 109 Register temp_reg, bool load_bc_into_bc_reg = true, int byte_no = -1);
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/openjdk10/hotspot/src/cpu/aarch64/vm/ |
H A D | macroAssembler_aarch64.cpp | 591 void MacroAssembler::biased_locking_exit(Register obj_reg, Register temp_reg, Label& done) { 600 ldr(temp_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes())); 601 andr(temp_reg, temp_reg, markOopDesc::biased_lock_mask_in_place); 602 cmp(temp_reg, markOopDesc::biased_lock_pattern); 1016 Register temp_reg, 1019 check_klass_subtype_fast_path(sub_klass, super_klass, temp_reg, &L_success, &L_failure, NULL); 1020 check_klass_subtype_slow_path(sub_klass, super_klass, temp_reg, noreg, &L_success, NULL); 1027 Register temp_reg, 1032 assert_different_registers(sub_klass, super_klass, temp_reg); [all...] |
H A D | macroAssembler_aarch64.hpp | 115 void biased_locking_exit (Register obj_reg, Register temp_reg, Label& done); 888 // No registers are killed, except temp_reg. 891 Register temp_reg, 899 // The temp_reg and temp2_reg can be noreg, if no temps are available. 904 Register temp_reg, 914 Register temp_reg,
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H A D | templateTable_aarch64.cpp | 223 Register temp_reg, bool load_bc_into_bc_reg/*=true*/, 247 __ get_cache_and_index_and_bytecode_at_bcp(temp_reg, bc_reg, temp_reg, byte_no, 1); 249 __ cbzw(temp_reg, L_patch_done); // don't patch 263 __ load_unsigned_byte(temp_reg, at_bcp(0)); 264 __ cmpw(temp_reg, Bytecodes::_breakpoint); 274 __ load_unsigned_byte(temp_reg, at_bcp(0)); 275 __ cmpw(temp_reg, (int) Bytecodes::java_code(bc)); 277 __ cmpw(temp_reg, bc_reg); 222 patch_bytecode(Bytecodes::Code bc, Register bc_reg, Register temp_reg, bool load_bc_into_bc_reg , int byte_no) argument
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