Searched refs:registers (Results 1 - 25 of 149) sorted by relevance

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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-frv/
H A Dsigcontext.h14 #include <asm/registers.h>
H A Duser.h15 #include <asm/registers.h>
21 * registers, and until these are solved you will not be able to view
24 * floating point registers contain.
31 * some point. All of the registers are stored as part of the
56 /* We start with the registers, to mimic the way that "memory" is returned
H A Dptrace.h14 #include <asm/registers.h>
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/um/os-Linux/sys-i386/
H A DMakefile6 obj-$(CONFIG_MODE_SKAS) = registers.o signal.o tls.o
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/um/os-Linux/sys-x86_64/
H A DMakefile6 obj-$(CONFIG_MODE_SKAS) = registers.o prctl.o signal.o
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/media/video/cpia2/
H A Dcpia2_core.c248 cmd.buffer.registers[0].index = CPIA2_VC_ST_CTRL;
249 cmd.buffer.registers[0].value = CPIA2_VC_ST_CTRL_SRC_VC |
251 cmd.buffer.registers[1].index = CPIA2_VC_ST_CTRL;
252 cmd.buffer.registers[1].value = CPIA2_VC_ST_CTRL_SRC_VC |
261 cmd.buffer.registers[0].index =
263 cmd.buffer.registers[1].index =
265 cmd.buffer.registers[0].value = CPIA2_SYSTEM_CONTROL_CLEAR_ERR;
266 cmd.buffer.registers[1].value =
373 cmd.buffer.registers[0].index = CPIA2_VC_VC_TARGET_KB;
374 cmd.buffer.registers[
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sparc/kernel/
H A Dsparc-stub.c59 * g return the value of the CPU registers hex data or ENN
60 * G set the value of the CPU registers OK or ENN
134 /* Number of bytes of registers. */
471 handle_exception (unsigned long *registers) argument
500 if (registers[PC] == (unsigned long)breakinst) {
502 registers[PC] = registers[NPC];
503 registers[NPC] += 4;
506 sp = (unsigned long *)registers[SP];
508 tt = (registers[TB
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-lh7a40x/
H A Duncompress.h11 #include <asm/arch/registers.h>
H A Dentry-macro.S32 mov \base, #io_p2v(0x80000000) @ APB registers
60 mov \base, #io_p2v(0x80000000) @ APB registers
87 mov \base, #io_p2v(0x80000000) @ APB registers
112 mov \base, #io_p2v(0x80000000) @ APB registers
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/sh64/lib/
H A Dpanic.c11 #include <asm/registers.h>
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/agp/
H A Damd-k7-agp.c31 volatile u8 __iomem *registers; member in struct:_amd_irongate_private
222 /* Get the memory mapped registers */
225 amd_irongate_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
228 writel(agp_bridge->gatt_bus_addr, amd_irongate_private.registers+AMD_ATTBASE);
229 readl(amd_irongate_private.registers+AMD_ATTBASE); /* PCI Posting. */
238 enable_reg = readw(amd_irongate_private.registers+AMD_GARTENABLE);
240 writew(enable_reg, amd_irongate_private.registers+AMD_GARTENABLE);
241 readw(amd_irongate_private.registers+AMD_GARTENABLE); /* PCI Posting. */
249 writel(1, amd_irongate_private.registers+AMD_TLBFLUSH);
250 readl(amd_irongate_private.registers
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H A Dsworks-agp.c23 /* Memory mapped registers */
38 volatile u8 __iomem *registers; member in struct:_serverworks_private
247 writeb(1, serverworks_private.registers+SVWRKS_POSTFLUSH);
249 while (readb(serverworks_private.registers+SVWRKS_POSTFLUSH) == 1) {
257 writel(1, serverworks_private.registers+SVWRKS_DIRFLUSH);
259 while (readl(serverworks_private.registers+SVWRKS_DIRFLUSH) == 1) {
277 /* Get the memory mapped registers */
280 serverworks_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
281 if (!serverworks_private.registers) {
286 writeb(0xA, serverworks_private.registers
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H A Dintel-agp.c49 /* Intel i820 registers */
53 /* Intel i840 registers */
57 /* Intel i850 registers */
61 /* intel 915G registers */
70 /* Intel 965G registers */
73 /* Intel 7505 registers */
104 u8 __iomem *registers; member in struct:_intel_private
150 if (!intel_private.registers) {
154 intel_private.registers = ioremap(temp, 128 * 4096);
155 if (!intel_private.registers) {
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H A Dati-agp.c50 volatile u8 __iomem *registers; member in struct:_ati_generic_private
187 writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL);
188 readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL); /* PCI Posting. */
208 iounmap((volatile u8 __iomem *)ati_generic_private.registers);
216 /* Get the memory mapped registers */
219 ati_generic_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096);
232 writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID);
233 readl(ati_generic_private.registers+ATI_GART_FEATURE_ID); /* PCI Posting.*/
240 writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers+ATI_GART_BASE);
241 readl(ati_generic_private.registers
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/
H A Dvfpmacros.h17 @ read all the working registers back into the VFP
26 @ write all the working registers out of the VFP
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/cris/arch-v10/kernel/
H A Dkgdb.c42 *! Added $ on registers and removed some underscores
97 * g return the value of the CPU registers hex data or ENN
98 * G set the value of the CPU registers OK or ENN
152 /* Use the order of registers as defined in "AXIS ETRAX CRIS Programmer's
155 There are 16 general 32-bit registers, R0-R15, where R14 is the stack
157 There are 16 special registers, P0-P15, where three of the unimplemented
158 registers, P0, P4 and P8, are reserved as zero-registers. A read from
159 any of these registers returns zero and a write has no effect. */
198 } registers; typedef in typeref:struct:register_image
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/ap/gpl/minidlna/jpeg-7/
H A Djmemdosa.asm17 ; we save and restore all 8086 registers, even though most compilers only
46 push si ; save all registers for safety
61 open_err: pop ds ; restore registers and exit
81 push si ; save all registers for safety
93 close_err: pop ds ; restore registers and exit
113 push si ; save all registers for safety
127 seek_err: pop ds ; restore registers and exit
147 push si ; save all registers for safety
165 read_err: pop ds ; restore registers and exit
185 push si ; save all registers fo
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-sh64/
H A Dthread_info.h12 #include <asm/registers.h>
H A Dchecksum.h15 #include <asm/registers.h>
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/usb/storage/
H A Dshuttle_usbat.c212 * Stores critical information in internal registers in prepartion for the execution
257 * registers where the byte count should be read for transferring the data.
390 unsigned char *registers,
431 * Write to multiple registers
467 data[j<<1] = registers[j];
546 * Write to multiple registers:
547 * Allows us to write specific data to any registers. The data to be written
553 unsigned char *registers,
563 /* Write to multiple registers, ATA access */
584 data[i<<1] = registers[
388 usbat_hp8200e_rw_block_test(struct us_data *us, unsigned char access, unsigned char *registers, unsigned char *data_out, unsigned short num_registers, unsigned char data_reg, unsigned char status_reg, unsigned char timeout, unsigned char qualifier, int direction, unsigned char *content, unsigned short len, int use_sg, int minutes) argument
552 usbat_multiple_write(struct us_data *us, unsigned char *registers, unsigned char *data_out, unsigned short num_registers) argument
927 unsigned char registers[3] = { local
985 unsigned char registers[7] = { local
1075 unsigned char registers[7] = { local
1159 usbat_hp8200e_handle_read10(struct us_data *us, unsigned char *registers, unsigned char *data, struct scsi_cmnd *srb) argument
1432 unsigned char registers[32]; local
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/boot/simple/rw4/
H A Drw4_init.S26 # Init_cpu. Bank registers are setup for the IBM STB.
31 # Three-State Select registers.
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-arm/arch-ks8695/
H A Ddebug-macro.S30 tst \rd, #URLS_URTE @ Holding & Shift registers empty?
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/arm/vfp/
H A Dvfphw.S87 @ process, so the registers are
96 @ Save out the current registers to the old thread state
107 VFPFSTMIA r4 @ save the working registers
117 VFPFLDMIA r10 @ reload the working registers while
182 VFPFSTMIA r0 @ save the working registers
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/frv/kernel/
H A Dhead-uc-fr451.S38 # set the protection map with the I/DAMPR registers
57 # set the I/O region protection registers for FR401/3/5
66 # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible
67 # - start with the highest numbered registers
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/aic7xxx/aicasm/
H A Daicasm_symbol.c460 * Sort the registers by address with a simple insertion sort.
464 symlist_t registers; local
480 SLIST_INIT(&registers);
495 symlist_add(&registers, cursym, SYMLIST_SORT);
532 SLIST_FOREACH(curnode, &registers, links) {
571 regnode = symlist_search(&registers, regname);
583 regnode = symlist_search(&registers, regname);
588 while (SLIST_FIRST(&registers) != NULL) {
594 curnode = SLIST_FIRST(&registers);
595 SLIST_REMOVE_HEAD(&registers, link
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