1/* 2 * ATi AGPGART routines. 3 */ 4 5#include <linux/types.h> 6#include <linux/module.h> 7#include <linux/pci.h> 8#include <linux/init.h> 9#include <linux/string.h> 10#include <linux/slab.h> 11#include <linux/agp_backend.h> 12#include <asm/agp.h> 13#include "agp.h" 14 15#define ATI_GART_MMBASE_ADDR 0x14 16#define ATI_RS100_APSIZE 0xac 17#define ATI_RS100_IG_AGPMODE 0xb0 18#define ATI_RS300_APSIZE 0xf8 19#define ATI_RS300_IG_AGPMODE 0xfc 20#define ATI_GART_FEATURE_ID 0x00 21#define ATI_GART_BASE 0x04 22#define ATI_GART_CACHE_SZBASE 0x08 23#define ATI_GART_CACHE_CNTRL 0x0c 24#define ATI_GART_CACHE_ENTRY_CNTRL 0x10 25 26 27static const struct aper_size_info_lvl2 ati_generic_sizes[7] = 28{ 29 {2048, 524288, 0x0000000c}, 30 {1024, 262144, 0x0000000a}, 31 {512, 131072, 0x00000008}, 32 {256, 65536, 0x00000006}, 33 {128, 32768, 0x00000004}, 34 {64, 16384, 0x00000002}, 35 {32, 8192, 0x00000000} 36}; 37 38static struct gatt_mask ati_generic_masks[] = 39{ 40 { .mask = 1, .type = 0} 41}; 42 43 44struct ati_page_map { 45 unsigned long *real; 46 unsigned long __iomem *remapped; 47}; 48 49static struct _ati_generic_private { 50 volatile u8 __iomem *registers; 51 struct ati_page_map **gatt_pages; 52 int num_tables; 53} ati_generic_private; 54 55static int ati_create_page_map(struct ati_page_map *page_map) 56{ 57 int i, err = 0; 58 59 page_map->real = (unsigned long *) __get_free_page(GFP_KERNEL); 60 if (page_map->real == NULL) 61 return -ENOMEM; 62 63 SetPageReserved(virt_to_page(page_map->real)); 64 err = map_page_into_agp(virt_to_page(page_map->real)); 65 page_map->remapped = ioremap_nocache(virt_to_gart(page_map->real), 66 PAGE_SIZE); 67 if (page_map->remapped == NULL || err) { 68 ClearPageReserved(virt_to_page(page_map->real)); 69 free_page((unsigned long) page_map->real); 70 page_map->real = NULL; 71 return -ENOMEM; 72 } 73 /*CACHE_FLUSH();*/ 74 global_cache_flush(); 75 76 for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) { 77 writel(agp_bridge->scratch_page, page_map->remapped+i); 78 readl(page_map->remapped+i); /* PCI Posting. */ 79 } 80 81 return 0; 82} 83 84 85static void ati_free_page_map(struct ati_page_map *page_map) 86{ 87 unmap_page_from_agp(virt_to_page(page_map->real)); 88 iounmap(page_map->remapped); 89 ClearPageReserved(virt_to_page(page_map->real)); 90 free_page((unsigned long) page_map->real); 91} 92 93 94static void ati_free_gatt_pages(void) 95{ 96 int i; 97 struct ati_page_map **tables; 98 struct ati_page_map *entry; 99 100 tables = ati_generic_private.gatt_pages; 101 for (i = 0; i < ati_generic_private.num_tables; i++) { 102 entry = tables[i]; 103 if (entry != NULL) { 104 if (entry->real != NULL) 105 ati_free_page_map(entry); 106 kfree(entry); 107 } 108 } 109 kfree(tables); 110} 111 112 113static int ati_create_gatt_pages(int nr_tables) 114{ 115 struct ati_page_map **tables; 116 struct ati_page_map *entry; 117 int retval = 0; 118 int i; 119 120 tables = kzalloc((nr_tables + 1) * sizeof(struct ati_page_map *),GFP_KERNEL); 121 if (tables == NULL) 122 return -ENOMEM; 123 124 for (i = 0; i < nr_tables; i++) { 125 entry = kzalloc(sizeof(struct ati_page_map), GFP_KERNEL); 126 if (entry == NULL) { 127 while (i > 0) { 128 kfree(tables[i-1]); 129 i--; 130 } 131 kfree(tables); 132 retval = -ENOMEM; 133 break; 134 } 135 tables[i] = entry; 136 retval = ati_create_page_map(entry); 137 if (retval != 0) 138 break; 139 } 140 ati_generic_private.num_tables = nr_tables; 141 ati_generic_private.gatt_pages = tables; 142 143 if (retval != 0) 144 ati_free_gatt_pages(); 145 146 return retval; 147} 148 149static int is_r200(void) 150{ 151 if ((agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS100) || 152 (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200) || 153 (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS200_B) || 154 (agp_bridge->dev->device == PCI_DEVICE_ID_ATI_RS250)) 155 return 1; 156 return 0; 157} 158 159static int ati_fetch_size(void) 160{ 161 int i; 162 u32 temp; 163 struct aper_size_info_lvl2 *values; 164 165 if (is_r200()) 166 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); 167 else 168 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); 169 170 temp = (temp & 0x0000000e); 171 values = A_SIZE_LVL2(agp_bridge->driver->aperture_sizes); 172 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) { 173 if (temp == values[i].size_value) { 174 agp_bridge->previous_size = 175 agp_bridge->current_size = (void *) (values + i); 176 177 agp_bridge->aperture_size_idx = i; 178 return values[i].size; 179 } 180 } 181 182 return 0; 183} 184 185static void ati_tlbflush(struct agp_memory * mem) 186{ 187 writel(1, ati_generic_private.registers+ATI_GART_CACHE_CNTRL); 188 readl(ati_generic_private.registers+ATI_GART_CACHE_CNTRL); /* PCI Posting. */ 189} 190 191static void ati_cleanup(void) 192{ 193 struct aper_size_info_lvl2 *previous_size; 194 u32 temp; 195 196 previous_size = A_SIZE_LVL2(agp_bridge->previous_size); 197 198 /* Write back the previous size and disable gart translation */ 199 if (is_r200()) { 200 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); 201 temp = ((temp & ~(0x0000000f)) | previous_size->size_value); 202 pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp); 203 } else { 204 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); 205 temp = ((temp & ~(0x0000000f)) | previous_size->size_value); 206 pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp); 207 } 208 iounmap((volatile u8 __iomem *)ati_generic_private.registers); 209} 210 211 212static int ati_configure(void) 213{ 214 u32 temp; 215 216 /* Get the memory mapped registers */ 217 pci_read_config_dword(agp_bridge->dev, ATI_GART_MMBASE_ADDR, &temp); 218 temp = (temp & 0xfffff000); 219 ati_generic_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096); 220 221 if (is_r200()) 222 pci_write_config_dword(agp_bridge->dev, ATI_RS100_IG_AGPMODE, 0x20000); 223 else 224 pci_write_config_dword(agp_bridge->dev, ATI_RS300_IG_AGPMODE, 0x20000); 225 226 /* address to map too */ 227 /* 228 pci_read_config_dword(agp_bridge.dev, AGP_APBASE, &temp); 229 agp_bridge.gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); 230 printk(KERN_INFO PFX "IGP320 gart_bus_addr: %x\n", agp_bridge.gart_bus_addr); 231 */ 232 writel(0x60000, ati_generic_private.registers+ATI_GART_FEATURE_ID); 233 readl(ati_generic_private.registers+ATI_GART_FEATURE_ID); /* PCI Posting.*/ 234 235 /* SIGNALED_SYSTEM_ERROR @ NB_STATUS */ 236 pci_read_config_dword(agp_bridge->dev, 4, &temp); 237 pci_write_config_dword(agp_bridge->dev, 4, temp | (1<<14)); 238 239 /* Write out the address of the gatt table */ 240 writel(agp_bridge->gatt_bus_addr, ati_generic_private.registers+ATI_GART_BASE); 241 readl(ati_generic_private.registers+ATI_GART_BASE); /* PCI Posting. */ 242 243 return 0; 244} 245 246 247#ifdef CONFIG_PM 248static int agp_ati_suspend(struct pci_dev *dev, pm_message_t state) 249{ 250 pci_save_state(dev); 251 pci_set_power_state(dev, 3); 252 253 return 0; 254} 255 256static int agp_ati_resume(struct pci_dev *dev) 257{ 258 pci_set_power_state(dev, 0); 259 pci_restore_state(dev); 260 261 return ati_configure(); 262} 263#endif 264 265/* 266 *Since we don't need contiguous memory we just try 267 * to get the gatt table once 268 */ 269 270#define GET_PAGE_DIR_OFF(addr) (addr >> 22) 271#define GET_PAGE_DIR_IDX(addr) (GET_PAGE_DIR_OFF(addr) - \ 272 GET_PAGE_DIR_OFF(agp_bridge->gart_bus_addr)) 273#define GET_GATT_OFF(addr) ((addr & 0x003ff000) >> 12) 274#undef GET_GATT 275#define GET_GATT(addr) (ati_generic_private.gatt_pages[\ 276 GET_PAGE_DIR_IDX(addr)]->remapped) 277 278static int ati_insert_memory(struct agp_memory * mem, 279 off_t pg_start, int type) 280{ 281 int i, j, num_entries; 282 unsigned long __iomem *cur_gatt; 283 unsigned long addr; 284 285 num_entries = A_SIZE_LVL2(agp_bridge->current_size)->num_entries; 286 287 if (type != 0 || mem->type != 0) 288 return -EINVAL; 289 290 if ((pg_start + mem->page_count) > num_entries) 291 return -EINVAL; 292 293 j = pg_start; 294 while (j < (pg_start + mem->page_count)) { 295 addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr; 296 cur_gatt = GET_GATT(addr); 297 if (!PGE_EMPTY(agp_bridge,readl(cur_gatt+GET_GATT_OFF(addr)))) 298 return -EBUSY; 299 j++; 300 } 301 302 if (mem->is_flushed == FALSE) { 303 /*CACHE_FLUSH(); */ 304 global_cache_flush(); 305 mem->is_flushed = TRUE; 306 } 307 308 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { 309 addr = (j * PAGE_SIZE) + agp_bridge->gart_bus_addr; 310 cur_gatt = GET_GATT(addr); 311 writel(agp_bridge->driver->mask_memory(agp_bridge, 312 mem->memory[i], mem->type), cur_gatt+GET_GATT_OFF(addr)); 313 readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */ 314 } 315 agp_bridge->driver->tlb_flush(mem); 316 return 0; 317} 318 319static int ati_remove_memory(struct agp_memory * mem, off_t pg_start, 320 int type) 321{ 322 int i; 323 unsigned long __iomem *cur_gatt; 324 unsigned long addr; 325 326 if (type != 0 || mem->type != 0) 327 return -EINVAL; 328 329 for (i = pg_start; i < (mem->page_count + pg_start); i++) { 330 addr = (i * PAGE_SIZE) + agp_bridge->gart_bus_addr; 331 cur_gatt = GET_GATT(addr); 332 writel(agp_bridge->scratch_page, cur_gatt+GET_GATT_OFF(addr)); 333 readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */ 334 } 335 336 agp_bridge->driver->tlb_flush(mem); 337 return 0; 338} 339 340static int ati_create_gatt_table(struct agp_bridge_data *bridge) 341{ 342 struct aper_size_info_lvl2 *value; 343 struct ati_page_map page_dir; 344 unsigned long addr; 345 int retval; 346 u32 temp; 347 int i; 348 struct aper_size_info_lvl2 *current_size; 349 350 value = A_SIZE_LVL2(agp_bridge->current_size); 351 retval = ati_create_page_map(&page_dir); 352 if (retval != 0) 353 return retval; 354 355 retval = ati_create_gatt_pages(value->num_entries / 1024); 356 if (retval != 0) { 357 ati_free_page_map(&page_dir); 358 return retval; 359 } 360 361 agp_bridge->gatt_table_real = (u32 *)page_dir.real; 362 agp_bridge->gatt_table = (u32 __iomem *) page_dir.remapped; 363 agp_bridge->gatt_bus_addr = virt_to_gart(page_dir.real); 364 365 /* Write out the size register */ 366 current_size = A_SIZE_LVL2(agp_bridge->current_size); 367 368 if (is_r200()) { 369 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); 370 temp = (((temp & ~(0x0000000e)) | current_size->size_value) 371 | 0x00000001); 372 pci_write_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, temp); 373 pci_read_config_dword(agp_bridge->dev, ATI_RS100_APSIZE, &temp); 374 } else { 375 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); 376 temp = (((temp & ~(0x0000000e)) | current_size->size_value) 377 | 0x00000001); 378 pci_write_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, temp); 379 pci_read_config_dword(agp_bridge->dev, ATI_RS300_APSIZE, &temp); 380 } 381 382 /* 383 * Get the address for the gart region. 384 * This is a bus address even on the alpha, b/c its 385 * used to program the agp master not the cpu 386 */ 387 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp); 388 addr = (temp & PCI_BASE_ADDRESS_MEM_MASK); 389 agp_bridge->gart_bus_addr = addr; 390 391 /* Calculate the agp offset */ 392 for (i = 0; i < value->num_entries / 1024; i++, addr += 0x00400000) { 393 writel(virt_to_gart(ati_generic_private.gatt_pages[i]->real) | 1, 394 page_dir.remapped+GET_PAGE_DIR_OFF(addr)); 395 readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr)); /* PCI Posting. */ 396 } 397 398 return 0; 399} 400 401static int ati_free_gatt_table(struct agp_bridge_data *bridge) 402{ 403 struct ati_page_map page_dir; 404 405 page_dir.real = (unsigned long *)agp_bridge->gatt_table_real; 406 page_dir.remapped = (unsigned long __iomem *)agp_bridge->gatt_table; 407 408 ati_free_gatt_pages(); 409 ati_free_page_map(&page_dir); 410 return 0; 411} 412 413static const struct agp_bridge_driver ati_generic_bridge = { 414 .owner = THIS_MODULE, 415 .aperture_sizes = ati_generic_sizes, 416 .size_type = LVL2_APER_SIZE, 417 .num_aperture_sizes = 7, 418 .configure = ati_configure, 419 .fetch_size = ati_fetch_size, 420 .cleanup = ati_cleanup, 421 .tlb_flush = ati_tlbflush, 422 .mask_memory = agp_generic_mask_memory, 423 .masks = ati_generic_masks, 424 .agp_enable = agp_generic_enable, 425 .cache_flush = global_cache_flush, 426 .create_gatt_table = ati_create_gatt_table, 427 .free_gatt_table = ati_free_gatt_table, 428 .insert_memory = ati_insert_memory, 429 .remove_memory = ati_remove_memory, 430 .alloc_by_type = agp_generic_alloc_by_type, 431 .free_by_type = agp_generic_free_by_type, 432 .agp_alloc_page = agp_generic_alloc_page, 433 .agp_destroy_page = agp_generic_destroy_page, 434 .agp_type_to_mask_type = agp_generic_type_to_mask_type, 435}; 436 437 438static struct agp_device_ids ati_agp_device_ids[] __devinitdata = 439{ 440 { 441 .device_id = PCI_DEVICE_ID_ATI_RS100, 442 .chipset_name = "IGP320/M", 443 }, 444 { 445 .device_id = PCI_DEVICE_ID_ATI_RS200, 446 .chipset_name = "IGP330/340/345/350/M", 447 }, 448 { 449 .device_id = PCI_DEVICE_ID_ATI_RS200_B, 450 .chipset_name = "IGP345M", 451 }, 452 { 453 .device_id = PCI_DEVICE_ID_ATI_RS250, 454 .chipset_name = "IGP7000/M", 455 }, 456 { 457 .device_id = PCI_DEVICE_ID_ATI_RS300_100, 458 .chipset_name = "IGP9100/M", 459 }, 460 { 461 .device_id = PCI_DEVICE_ID_ATI_RS300_133, 462 .chipset_name = "IGP9100/M", 463 }, 464 { 465 .device_id = PCI_DEVICE_ID_ATI_RS300_166, 466 .chipset_name = "IGP9100/M", 467 }, 468 { 469 .device_id = PCI_DEVICE_ID_ATI_RS300_200, 470 .chipset_name = "IGP9100/M", 471 }, 472 { 473 .device_id = PCI_DEVICE_ID_ATI_RS350_200, 474 .chipset_name = "IGP9100/M", 475 }, 476 { }, /* dummy final entry, always present */ 477}; 478 479static int __devinit agp_ati_probe(struct pci_dev *pdev, 480 const struct pci_device_id *ent) 481{ 482 struct agp_device_ids *devs = ati_agp_device_ids; 483 struct agp_bridge_data *bridge; 484 u8 cap_ptr; 485 int j; 486 487 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); 488 if (!cap_ptr) 489 return -ENODEV; 490 491 /* probe for known chipsets */ 492 for (j = 0; devs[j].chipset_name; j++) { 493 if (pdev->device == devs[j].device_id) 494 goto found; 495 } 496 497 printk(KERN_ERR PFX 498 "Unsupported Ati chipset (device id: %04x)\n", pdev->device); 499 return -ENODEV; 500 501found: 502 bridge = agp_alloc_bridge(); 503 if (!bridge) 504 return -ENOMEM; 505 506 bridge->dev = pdev; 507 bridge->capndx = cap_ptr; 508 509 bridge->driver = &ati_generic_bridge; 510 511 printk(KERN_INFO PFX "Detected Ati %s chipset\n", 512 devs[j].chipset_name); 513 514 /* Fill in the mode register */ 515 pci_read_config_dword(pdev, 516 bridge->capndx+PCI_AGP_STATUS, 517 &bridge->mode); 518 519 pci_set_drvdata(pdev, bridge); 520 return agp_add_bridge(bridge); 521} 522 523static void __devexit agp_ati_remove(struct pci_dev *pdev) 524{ 525 struct agp_bridge_data *bridge = pci_get_drvdata(pdev); 526 527 agp_remove_bridge(bridge); 528 agp_put_bridge(bridge); 529} 530 531static struct pci_device_id agp_ati_pci_table[] = { 532 { 533 .class = (PCI_CLASS_BRIDGE_HOST << 8), 534 .class_mask = ~0, 535 .vendor = PCI_VENDOR_ID_ATI, 536 .device = PCI_ANY_ID, 537 .subvendor = PCI_ANY_ID, 538 .subdevice = PCI_ANY_ID, 539 }, 540 { } 541}; 542 543MODULE_DEVICE_TABLE(pci, agp_ati_pci_table); 544 545static struct pci_driver agp_ati_pci_driver = { 546 .name = "agpgart-ati", 547 .id_table = agp_ati_pci_table, 548 .probe = agp_ati_probe, 549 .remove = agp_ati_remove, 550#ifdef CONFIG_PM 551 .suspend = agp_ati_suspend, 552 .resume = agp_ati_resume, 553#endif 554}; 555 556static int __init agp_ati_init(void) 557{ 558 if (agp_off) 559 return -EINVAL; 560 return pci_register_driver(&agp_ati_pci_driver); 561} 562 563static void __exit agp_ati_cleanup(void) 564{ 565 pci_unregister_driver(&agp_ati_pci_driver); 566} 567 568module_init(agp_ati_init); 569module_exit(agp_ati_cleanup); 570 571MODULE_AUTHOR("Dave Jones <davej@codemonkey.org.uk>"); 572MODULE_LICENSE("GPL and additional rights"); 573