/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/syslib/ |
H A D | ibm44x_common.c | 124 bank_config = mfdcr(DCRN_SDRAM0_CFGDATA); 217 mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL), 218 mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESRH), 219 mfdcr(DCRN_PLB0_BESRL)); 221 mfdcr(DCRN_PLB1_BEARH), mfdcr(DCRN_PLB1_BEARL), 222 mfdcr(DCRN_PLB1_ACR), mfdcr(DCRN_PLB1_BESR [all...] |
H A D | ibm440gx_common.c | 118 while (!(mfdcr(DCRN_L2C0_SR) & L2C_SR_CC)) ; 119 return mfdcr(DCRN_L2C0_DATA); 124 u32 sr = mfdcr(DCRN_L2C0_SR); 161 mtdcr(DCRN_SRAM0_DPC, mfdcr(DCRN_SRAM0_DPC) & ~SRAM_DPC_ENABLE); 162 mtdcr(DCRN_SRAM0_SB0CR, mfdcr(DCRN_SRAM0_SB0CR) & ~SRAM_SBCR_BU_MASK); 163 mtdcr(DCRN_SRAM0_SB1CR, mfdcr(DCRN_SRAM0_SB1CR) & ~SRAM_SBCR_BU_MASK); 164 mtdcr(DCRN_SRAM0_SB2CR, mfdcr(DCRN_SRAM0_SB2CR) & ~SRAM_SBCR_BU_MASK); 165 mtdcr(DCRN_SRAM0_SB3CR, mfdcr(DCRN_SRAM0_SB3CR) & ~SRAM_SBCR_BU_MASK); 168 r = mfdcr(DCRN_L2C0_CFG) & ~(L2C_CFG_ICU | L2C_CFG_DCU | L2C_CFG_SS_MASK); 176 while (!(mfdcr(DCRN_L2C0_S [all...] |
H A D | ppc4xx_pic.c | 101 u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0)); 103 return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1))); 105 return 96 - ffs(mfdcr(DCRN_UIC_MSR(UIC2))); 107 return 128 - ffs(mfdcr(DCRN_UIC_MSR(UIC3))); 130 u32 uicb = mfdcr(DCRN_UIC_MSR(UICB)); 132 return 32 - ffs(mfdcr(DCRN_UIC_MSR(UIC0))); 134 return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1))); 136 return 96 - ffs(mfdcr(DCRN_UIC_MSR(UIC2))); 163 u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0)); 165 return 64 - ffs(mfdcr(DCRN_UIC_MS [all...] |
H A D | ppc4xx_setup.c | 170 mtdcr(DCRN_CHCR1, mfdcr(DCRN_CHCR1) & ~CHR1_CETE); 285 mfdcr(DCRN_PLB0_BEAR), mfdcr(DCRN_PLB0_ACR), 286 mfdcr(DCRN_PLB0_BESR)); 290 mfdcr(DCRN_POB0_BEAR), mfdcr(DCRN_POB0_BESR0), 291 mfdcr(DCRN_POB0_BESR1));
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H A D | ibm440gp_common.c | 28 u32 cpc0_sys0 = mfdcr(DCRN_CPC0_SYS0); 29 u32 cpc0_cr0 = mfdcr(DCRN_CPC0_CR0);
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H A D | ppc403_pic.c | 55 bits = mfdcr(DCRN_EXISR) & mfdcr(DCRN_EXIER);
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H A D | ppc4xx_dma.c | 38 return (mfdcr(DCRN_DMASR)); 102 control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); 158 control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); 260 count = mfdcr(DCRN_DMACT0 + (dmanr * 0x8)); 389 control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); 417 control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); 454 polarity = mfdcr(DCRN_POL); 516 polarity = mfdcr(DCRN_POL); 522 control = mfdcr(DCRN_DMACR0 + (dmanr * 0x8)); 572 control = mfdcr(DCRN_DMACR [all...] |
H A D | ibm440sp_common.c | 36 switch (mfdcr(DCRN_MQ0_BS0BAS + i) & MQ0_CONFIG_SIZE_MASK) {
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H A D | ppc4xx_sgdma.c | 165 sg_command = mfdcr(DCRN_ASGC); 192 sg_command = mfdcr(DCRN_ASGC); 222 sgl_addr = (ppc_sgl_t *) __va(mfdcr(DCRN_ASG0 + (psgl->dmanr * 0x8))); 223 count_left = mfdcr(DCRN_DMACT0 + (psgl->dmanr * 0x8)) & SG_COUNT_MASK; 412 sg_command = mfdcr(DCRN_ASGC); 420 ctc_settings = mfdcr(DCRN_DMACT0 + (dmanr * 0x8))
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H A D | xilinx_pic.c | 37 #define intc_in_be32(addr) mfdcr((addr))
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/powerpc/sysdev/ |
H A D | dcr-low.S | 30 mfdcr r3,0; blr 36 mfdcr r3,dcr; blr
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H A D | uic.c | 71 er = mfdcr(uic->dcrbase + UIC_ER); 85 er = mfdcr(uic->dcrbase + UIC_ER); 135 tr = mfdcr(uic->dcrbase + UIC_TR); 136 pr = mfdcr(uic->dcrbase + UIC_PR); 207 msr = mfdcr(uic->dcrbase + UIC_MSR); 335 msr = mfdcr(primary_uic->dcrbase + UIC_MSR);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/powerpc/boot/ |
H A D | 44x.c | 33 bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
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H A D | ebony.c | 38 u32 sys0 = mfdcr(DCRN_CPC0_SYS0); 39 u32 cr0 = mfdcr(DCRN_CPC0_CR0);
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H A D | dcr.h | 4 #define mfdcr(rn) \ macro 7 asm volatile("mfdcr %0,%1" : "=r"(rval) : "i"(rn)); \
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-powerpc/ |
H A D | dcr-native.h | 31 #define dcr_read(host, dcr_n) mfdcr(dcr_n) 37 #define mfdcr(rn) \ macro 40 asm volatile("mfdcr %0," __stringify(rn) \ 59 mfdcr(base ## _CFGDATA); \
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/include/asm-ppc/ |
H A D | ocp.h | 152 mtdcr(DCRN_CPMFR, mfdcr(DCRN_CPMFR) | odev->def->pm); 158 mtdcr(DCRN_CPMFR, mfdcr(DCRN_CPMFR) & ~odev->def->pm);
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H A D | ibm44x.h | 136 mfdcr(DCRN_CPR_CONFIG_DATA);}) 186 mfdcr(DCRN_SDR_CONFIG_DATA);})
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/boot/simple/ |
H A D | misc.c | 110 while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {};
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H A D | embed_config.c | 786 while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */ 842 chcr0 = mfdcr(DCRN_CHCR0); 854 while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/platforms/4xx/ |
H A D | cpci405.c | 76 uart_div = ((mfdcr(DCRN_CHCR_BASE) & CHR0_UDIV) >> 1) + 1;
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H A D | bubinga.c | 90 uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/boot/simple/rw4/ |
H A D | rw4_init_brd.S | 924 mfdcr r10,hsmc0_cr0 /* r11 <- HSMC0 CR0 value */ 930 mfdcr r10,hsmc0_cr1 /* r10 <- HSMC0 CR1 value */ 936 mfdcr r10,hsmc1_cr0 /* r10 <- HSMC1 CR0 value */ 942 mfdcr r10,hsmc1_cr1 /* r10 <- HSMC1 CR1 value */
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/ppc/4xx_io/ |
H A D | serial_sicc.c | 313 return mfdcr(DCRN_CICCR); 318 return mfdcr(DCRN_SCCR);
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/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/ibm_emac/ |
H A D | ibm_emac_core.c | 100 mtdcr(0xf3, mfdcr(0xf3) | (1 << idx)); 114 mtdcr(0xf3, mfdcr(0xf3) & ~(1 << idx));
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