1/* Board specific functions for those embedded 8xx boards that do 2 * not have boot monitor support for board information. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 */ 9 10#include <linux/types.h> 11#include <linux/string.h> 12#include <asm/reg.h> 13#ifdef CONFIG_8xx 14#include <asm/mpc8xx.h> 15#endif 16#ifdef CONFIG_8260 17#include <asm/mpc8260.h> 18#include <asm/immap_cpm2.h> 19#endif 20#ifdef CONFIG_40x 21#include <asm/io.h> 22#endif 23#ifdef CONFIG_XILINX_VIRTEX 24#include <platforms/4xx/xparameters/xparameters.h> 25#endif 26extern unsigned long timebase_period_ns; 27 28/* For those boards that don't provide one. 29*/ 30#if !defined(CONFIG_MBX) 31static bd_t bdinfo; 32#endif 33 34/* IIC functions. 35 * These are just the basic master read/write operations so we can 36 * examine serial EEPROM. 37 */ 38extern void iic_read(uint devaddr, u_char *buf, uint offset, uint count); 39 40/* Supply a default Ethernet address for those eval boards that don't 41 * ship with one. This is an address from the MBX board I have, so 42 * it is unlikely you will find it on your network. 43 */ 44static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 }; 45 46#if defined(CONFIG_MBX) 47 48/* The MBX hands us a pretty much ready to go board descriptor. This 49 * is where the idea started in the first place. 50 */ 51void 52embed_config(bd_t **bdp) 53{ 54 u_char *mp; 55 u_char eebuf[128]; 56 int i = 8; 57 bd_t *bd; 58 59 bd = *bdp; 60 61 /* Read the first 128 bytes of the EEPROM. There is more, 62 * but this is all we need. 63 */ 64 iic_read(0xa4, eebuf, 0, 128); 65 66 /* All we are looking for is the Ethernet MAC address. The 67 * first 8 bytes are 'MOTOROLA', so check for part of that. 68 * Next, the VPD describes a MAC 'packet' as being of type 08 69 * and size 06. So we look for that and the MAC must follow. 70 * If there are more than one, we still only care about the first. 71 * If it's there, assume we have a valid MAC address. If not, 72 * grab our default one. 73 */ 74 if ((*(uint *)eebuf) == 0x4d4f544f) { 75 while (i < 127 && !(eebuf[i] == 0x08 && eebuf[i + 1] == 0x06)) 76 i += eebuf[i + 1] + 2; /* skip this packet */ 77 78 if (i == 127) /* Couldn't find. */ 79 mp = (u_char *)def_enet_addr; 80 else 81 mp = &eebuf[i + 2]; 82 } 83 else 84 mp = (u_char *)def_enet_addr; 85 86 for (i=0; i<6; i++) 87 bd->bi_enetaddr[i] = *mp++; 88 89 /* The boot rom passes these to us in MHz. Linux now expects 90 * them to be in Hz. 91 */ 92 bd->bi_intfreq *= 1000000; 93 bd->bi_busfreq *= 1000000; 94 95 /* Stuff a baud rate here as well. 96 */ 97 bd->bi_baudrate = 9600; 98} 99#endif /* CONFIG_MBX */ 100 101#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || defined(CONFIG_RPX8260) || \ 102 defined(CONFIG_EP405) 103/* Helper functions for Embedded Planet boards. 104*/ 105/* Because I didn't find anything that would do this....... 106*/ 107u_char 108aschex_to_byte(u_char *cp) 109{ 110 u_char byte, c; 111 112 c = *cp++; 113 114 if ((c >= 'A') && (c <= 'F')) { 115 c -= 'A'; 116 c += 10; 117 } else if ((c >= 'a') && (c <= 'f')) { 118 c -= 'a'; 119 c += 10; 120 } else 121 c -= '0'; 122 123 byte = c * 16; 124 125 c = *cp; 126 127 if ((c >= 'A') && (c <= 'F')) { 128 c -= 'A'; 129 c += 10; 130 } else if ((c >= 'a') && (c <= 'f')) { 131 c -= 'a'; 132 c += 10; 133 } else 134 c -= '0'; 135 136 byte += c; 137 138 return(byte); 139} 140 141static void 142rpx_eth(bd_t *bd, u_char *cp) 143{ 144 int i; 145 146 for (i=0; i<6; i++) { 147 bd->bi_enetaddr[i] = aschex_to_byte(cp); 148 cp += 2; 149 } 150} 151 152#ifdef CONFIG_RPX8260 153static uint 154rpx_baseten(u_char *cp) 155{ 156 uint retval; 157 158 retval = 0; 159 160 while (*cp != '\n') { 161 retval *= 10; 162 retval += (*cp) - '0'; 163 cp++; 164 } 165 return(retval); 166} 167#endif 168 169#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) 170static void 171rpx_brate(bd_t *bd, u_char *cp) 172{ 173 uint rate; 174 175 rate = 0; 176 177 while (*cp != '\n') { 178 rate *= 10; 179 rate += (*cp) - '0'; 180 cp++; 181 } 182 183 bd->bi_baudrate = rate * 100; 184} 185 186static void 187rpx_cpuspeed(bd_t *bd, u_char *cp) 188{ 189 uint num, den; 190 191 num = den = 0; 192 193 while (*cp != '\n') { 194 num *= 10; 195 num += (*cp) - '0'; 196 cp++; 197 if (*cp == '/') { 198 cp++; 199 den = (*cp) - '0'; 200 break; 201 } 202 } 203 204 /* I don't know why the RPX just can't state the actual 205 * CPU speed..... 206 */ 207 if (den) { 208 num /= den; 209 num *= den; 210 } 211 bd->bi_intfreq = bd->bi_busfreq = num * 1000000; 212 213 /* The 8xx can only run a maximum 50 MHz bus speed (until 214 * Motorola changes this :-). Greater than 50 MHz parts 215 * run internal/2 for bus speed. 216 */ 217 if (num > 50) 218 bd->bi_busfreq /= 2; 219} 220#endif 221 222#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || defined(CONFIG_EP405) 223static void 224rpx_memsize(bd_t *bd, u_char *cp) 225{ 226 uint size; 227 228 size = 0; 229 230 while (*cp != '\n') { 231 size *= 10; 232 size += (*cp) - '0'; 233 cp++; 234 } 235 236 bd->bi_memsize = size * 1024 * 1024; 237} 238#endif /* LITE || CLASSIC || EP405 */ 239#if defined(CONFIG_EP405) 240static void 241rpx_nvramsize(bd_t *bd, u_char *cp) 242{ 243 uint size; 244 245 size = 0; 246 247 while (*cp != '\n') { 248 size *= 10; 249 size += (*cp) - '0'; 250 cp++; 251 } 252 253 bd->bi_nvramsize = size * 1024; 254} 255#endif /* CONFIG_EP405 */ 256 257#endif /* Embedded Planet boards */ 258 259#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) 260 261/* Read the EEPROM on the RPX-Lite board. 262*/ 263void 264embed_config(bd_t **bdp) 265{ 266 u_char eebuf[256], *cp; 267 bd_t *bd; 268 269 /* Read the first 256 bytes of the EEPROM. I think this 270 * is really all there is, and I hope if it gets bigger the 271 * info we want is still up front. 272 */ 273 bd = &bdinfo; 274 *bdp = bd; 275 276 iic_read(0xa8, eebuf, 0, 128); 277 iic_read(0xa8, &eebuf[128], 128, 128); 278 279 /* We look for two things, the Ethernet address and the 280 * serial baud rate. The records are separated by 281 * newlines. 282 */ 283 cp = eebuf; 284 for (;;) { 285 if (*cp == 'E') { 286 cp++; 287 if (*cp == 'A') { 288 cp += 2; 289 rpx_eth(bd, cp); 290 } 291 } 292 if (*cp == 'S') { 293 cp++; 294 if (*cp == 'B') { 295 cp += 2; 296 rpx_brate(bd, cp); 297 } 298 } 299 if (*cp == 'D') { 300 cp++; 301 if (*cp == '1') { 302 cp += 2; 303 rpx_memsize(bd, cp); 304 } 305 } 306 if (*cp == 'H') { 307 cp++; 308 if (*cp == 'Z') { 309 cp += 2; 310 rpx_cpuspeed(bd, cp); 311 } 312 } 313 314 /* Scan to the end of the record. 315 */ 316 while ((*cp != '\n') && (*cp != 0xff)) 317 cp++; 318 319 /* If the next character is a 0 or ff, we are done. 320 */ 321 cp++; 322 if ((*cp == 0) || (*cp == 0xff)) 323 break; 324 } 325 bd->bi_memstart = 0; 326} 327#endif /* RPXLITE || RPXCLASSIC */ 328 329#ifdef CONFIG_BSEIP 330/* Build a board information structure for the BSE ip-Engine. 331 * There is more to come since we will add some environment 332 * variables and a function to read them. 333 */ 334void 335embed_config(bd_t **bdp) 336{ 337 u_char *cp; 338 int i; 339 bd_t *bd; 340 341 bd = &bdinfo; 342 *bdp = bd; 343 344 /* Baud rate and processor speed will eventually come 345 * from the environment variables. 346 */ 347 bd->bi_baudrate = 9600; 348 349 /* Get the Ethernet station address from the Flash ROM. 350 */ 351 cp = (u_char *)0xfe003ffa; 352 for (i=0; i<6; i++) { 353 bd->bi_enetaddr[i] = *cp++; 354 } 355 356 /* The rest of this should come from the environment as well. 357 */ 358 bd->bi_memstart = 0; 359 bd->bi_memsize = (16 * 1024 * 1024); 360 bd->bi_intfreq = 48000000; 361 bd->bi_busfreq = 48000000; 362} 363#endif /* BSEIP */ 364 365#ifdef CONFIG_FADS 366/* Build a board information structure for the FADS. 367 */ 368void 369embed_config(bd_t **bdp) 370{ 371 u_char *cp; 372 int i; 373 bd_t *bd; 374 375 bd = &bdinfo; 376 *bdp = bd; 377 378 /* Just fill in some known values. 379 */ 380 bd->bi_baudrate = 9600; 381 382 /* Use default enet. 383 */ 384 cp = (u_char *)def_enet_addr; 385 for (i=0; i<6; i++) { 386 bd->bi_enetaddr[i] = *cp++; 387 } 388 389 bd->bi_memstart = 0; 390 bd->bi_memsize = (8 * 1024 * 1024); 391 bd->bi_intfreq = 40000000; 392 bd->bi_busfreq = 40000000; 393} 394#endif /* FADS */ 395 396#ifdef CONFIG_8260 397/* Compute 8260 clock values if the rom doesn't provide them. 398 */ 399static unsigned char bus2core_8260[] = { 400/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 401 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2, 402 6, 5, 13, 2, 14, 4, 15, 2, 3, 11, 8, 10, 16, 12, 7, 2, 403}; 404 405static void 406clk_8260(bd_t *bd) 407{ 408 uint scmr, vco_out, clkin; 409 uint plldf, pllmf, corecnf; 410 volatile cpm2_map_t *ip; 411 412 ip = (cpm2_map_t *)CPM_MAP_ADDR; 413 scmr = ip->im_clkrst.car_scmr; 414 415 /* The clkin is always bus frequency. 416 */ 417 clkin = bd->bi_busfreq; 418 419 /* Collect the bits from the scmr. 420 */ 421 plldf = (scmr >> 12) & 1; 422 pllmf = scmr & 0xfff; 423 corecnf = (scmr >> 24) &0x1f; 424 425 /* This is arithmetic from the 8260 manual. 426 */ 427 vco_out = clkin / (plldf + 1); 428 vco_out *= 2 * (pllmf + 1); 429 bd->bi_vco = vco_out; /* Save for later */ 430 431 bd->bi_cpmfreq = vco_out / 2; /* CPM Freq, in MHz */ 432 bd->bi_intfreq = bd->bi_busfreq * bus2core_8260[corecnf] / 2; 433 434 /* Set Baud rate divisor. The power up default is divide by 16, 435 * but we set it again here in case it was changed. 436 */ 437 ip->im_clkrst.car_sccr = 1; /* DIV 16 BRG */ 438 bd->bi_brgfreq = vco_out / 16; 439} 440 441static unsigned char bus2core_8280[] = { 442/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 443 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2, 444 6, 5, 13, 2, 14, 2, 15, 2, 3, 2, 2, 2, 16, 2, 2, 2, 445}; 446 447static void 448clk_8280(bd_t *bd) 449{ 450 uint scmr, main_clk, clkin; 451 uint pllmf, corecnf; 452 volatile cpm2_map_t *ip; 453 454 ip = (cpm2_map_t *)CPM_MAP_ADDR; 455 scmr = ip->im_clkrst.car_scmr; 456 457 /* The clkin is always bus frequency. 458 */ 459 clkin = bd->bi_busfreq; 460 461 /* Collect the bits from the scmr. 462 */ 463 pllmf = scmr & 0xf; 464 corecnf = (scmr >> 24) & 0x1f; 465 466 /* This is arithmetic from the 8280 manual. 467 */ 468 main_clk = clkin * (pllmf + 1); 469 470 bd->bi_cpmfreq = main_clk / 2; /* CPM Freq, in MHz */ 471 bd->bi_intfreq = bd->bi_busfreq * bus2core_8280[corecnf] / 2; 472 473 /* Set Baud rate divisor. The power up default is divide by 16, 474 * but we set it again here in case it was changed. 475 */ 476 ip->im_clkrst.car_sccr = (ip->im_clkrst.car_sccr & 0x3) | 0x1; 477 bd->bi_brgfreq = main_clk / 16; 478} 479#endif 480 481#ifdef CONFIG_SBC82xx 482void 483embed_config(bd_t **bdp) 484{ 485 u_char *cp; 486 int i; 487 bd_t *bd; 488 unsigned long pvr; 489 490 bd = *bdp; 491 492 bd = &bdinfo; 493 *bdp = bd; 494 bd->bi_baudrate = 9600; 495 bd->bi_memsize = 256 * 1024 * 1024; /* just a guess */ 496 497 cp = (void*)SBC82xx_MACADDR_NVRAM_SCC1; 498 memcpy(bd->bi_enetaddr, cp, 6); 499 500 /* can busfreq be calculated? */ 501 pvr = mfspr(SPRN_PVR); 502 if ((pvr & 0xffff0000) == 0x80820000) { 503 bd->bi_busfreq = 100000000; 504 clk_8280(bd); 505 } else { 506 bd->bi_busfreq = 66000000; 507 clk_8260(bd); 508 } 509 510} 511#endif /* SBC82xx */ 512 513#if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260) 514void 515embed_config(bd_t **bdp) 516{ 517 u_char *cp; 518 int i; 519 bd_t *bd; 520 521 bd = *bdp; 522 /* The boot rom passes these to us in MHz. Linux now expects 523 * them to be in Hz. 524 */ 525 bd->bi_intfreq *= 1000000; 526 bd->bi_busfreq *= 1000000; 527 bd->bi_cpmfreq *= 1000000; 528 bd->bi_brgfreq *= 1000000; 529 530 cp = (u_char *)def_enet_addr; 531 for (i=0; i<6; i++) { 532 bd->bi_enetaddr[i] = *cp++; 533 } 534} 535#endif /* EST8260 */ 536 537#ifdef CONFIG_SBS8260 538void 539embed_config(bd_t **bdp) 540{ 541 u_char *cp; 542 int i; 543 bd_t *bd; 544 545 /* This should provided by the boot rom. 546 */ 547 bd = &bdinfo; 548 *bdp = bd; 549 bd->bi_baudrate = 9600; 550 bd->bi_memsize = 64 * 1024 * 1024; 551 552 /* Set all of the clocks. We have to know the speed of the 553 * external clock. The development board had 66 MHz. 554 */ 555 bd->bi_busfreq = 66666666; 556 clk_8260(bd); 557 558 /* I don't know how to compute this yet. 559 */ 560 bd->bi_intfreq = 133000000; 561 562 563 cp = (u_char *)def_enet_addr; 564 for (i=0; i<6; i++) { 565 bd->bi_enetaddr[i] = *cp++; 566 } 567} 568#endif /* SBS8260 */ 569 570#ifdef CONFIG_RPX8260 571void 572embed_config(bd_t **bdp) 573{ 574 u_char *cp, *keyvals; 575 int i; 576 bd_t *bd; 577 578 keyvals = (u_char *)*bdp; 579 580 bd = &bdinfo; 581 *bdp = bd; 582 583 /* This is almost identical to the RPX-Lite/Classic functions 584 * on the 8xx boards. It would be nice to have a key lookup 585 * function in a string, but the format of all of the fields 586 * is slightly different. 587 */ 588 cp = keyvals; 589 for (;;) { 590 if (*cp == 'E') { 591 cp++; 592 if (*cp == 'A') { 593 cp += 2; 594 rpx_eth(bd, cp); 595 } 596 } 597 if (*cp == 'S') { 598 cp++; 599 if (*cp == 'B') { 600 cp += 2; 601 bd->bi_baudrate = rpx_baseten(cp); 602 } 603 } 604 if (*cp == 'D') { 605 cp++; 606 if (*cp == '1') { 607 cp += 2; 608 bd->bi_memsize = rpx_baseten(cp) * 1024 * 1024; 609 } 610 } 611 if (*cp == 'X') { 612 cp++; 613 if (*cp == 'T') { 614 cp += 2; 615 bd->bi_busfreq = rpx_baseten(cp); 616 } 617 } 618 if (*cp == 'N') { 619 cp++; 620 if (*cp == 'V') { 621 cp += 2; 622 bd->bi_nvsize = rpx_baseten(cp) * 1024 * 1024; 623 } 624 } 625 626 /* Scan to the end of the record. 627 */ 628 while ((*cp != '\n') && (*cp != 0xff)) 629 cp++; 630 631 /* If the next character is a 0 or ff, we are done. 632 */ 633 cp++; 634 if ((*cp == 0) || (*cp == 0xff)) 635 break; 636 } 637 bd->bi_memstart = 0; 638 639 /* The memory size includes both the 60x and local bus DRAM. 640 * I don't want to use the local bus DRAM for real memory, 641 * so subtract it out. It would be nice if they were separate 642 * keys. 643 */ 644 bd->bi_memsize -= 32 * 1024 * 1024; 645 646 /* Set all of the clocks. We have to know the speed of the 647 * external clock. 648 */ 649 clk_8260(bd); 650 651 /* I don't know how to compute this yet. 652 */ 653 bd->bi_intfreq = 200000000; 654} 655#endif /* RPX6 for testing */ 656 657#ifdef CONFIG_ADS8260 658void 659embed_config(bd_t **bdp) 660{ 661 u_char *cp; 662 int i; 663 bd_t *bd; 664 665 /* This should provided by the boot rom. 666 */ 667 bd = &bdinfo; 668 *bdp = bd; 669 bd->bi_baudrate = 9600; 670 bd->bi_memsize = 16 * 1024 * 1024; 671 672 /* Set all of the clocks. We have to know the speed of the 673 * external clock. The development board had 66 MHz. 674 */ 675 bd->bi_busfreq = 66666666; 676 clk_8260(bd); 677 678 /* I don't know how to compute this yet. 679 */ 680 bd->bi_intfreq = 200000000; 681 682 683 cp = (u_char *)def_enet_addr; 684 for (i=0; i<6; i++) { 685 bd->bi_enetaddr[i] = *cp++; 686 } 687} 688#endif /* ADS8260 */ 689 690#ifdef CONFIG_WILLOW 691void 692embed_config(bd_t **bdp) 693{ 694 u_char *cp; 695 int i; 696 bd_t *bd; 697 698 /* Willow has Open Firmware....I should learn how to get this 699 * information from it. 700 */ 701 bd = &bdinfo; 702 *bdp = bd; 703 bd->bi_baudrate = 9600; 704 bd->bi_memsize = 32 * 1024 * 1024; 705 706 /* Set all of the clocks. We have to know the speed of the 707 * external clock. The development board had 66 MHz. 708 */ 709 bd->bi_busfreq = 66666666; 710 clk_8260(bd); 711 712 /* I don't know how to compute this yet. 713 */ 714 bd->bi_intfreq = 200000000; 715 716 717 cp = (u_char *)def_enet_addr; 718 for (i=0; i<6; i++) { 719 bd->bi_enetaddr[i] = *cp++; 720 } 721} 722#endif /* WILLOW */ 723 724#if defined(CONFIG_XILINX_ML300) || defined(CONFIG_XILINX_ML403) 725void 726embed_config(bd_t ** bdp) 727{ 728 static const unsigned long line_size = 32; 729 static const unsigned long congruence_classes = 256; 730 unsigned long addr; 731 unsigned long dccr; 732 bd_t *bd; 733 734 /* 735 * Invalidate the data cache if the data cache is turned off. 736 * - The 405 core does not invalidate the data cache on power-up 737 * or reset but does turn off the data cache. We cannot assume 738 * that the cache contents are valid. 739 * - If the data cache is turned on this must have been done by 740 * a bootloader and we assume that the cache contents are 741 * valid. 742 */ 743 __asm__("mfdccr %0": "=r" (dccr)); 744 if (dccr == 0) { 745 for (addr = 0; 746 addr < (congruence_classes * line_size); 747 addr += line_size) { 748 __asm__("dccci 0,%0": :"b"(addr)); 749 } 750 } 751 752 bd = &bdinfo; 753 *bdp = bd; 754 bd->bi_memsize = XPAR_DDR_0_SIZE; 755 bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ; 756 bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ; 757 bd->bi_pci_busfreq = XPAR_PCI_0_CLOCK_FREQ_HZ; 758 timebase_period_ns = 1000000000 / bd->bi_tbfreq; 759 /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */ 760} 761#endif /* CONFIG_XILINX_ML300 || CONFIG_XILINX_ML403 */ 762 763#ifdef CONFIG_IBM_OPENBIOS 764/* This could possibly work for all treeboot roms. 765*/ 766#if defined(CONFIG_BUBINGA) 767#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */ 768#else 769#define BOARD_INFO_VECTOR 0xFFFE0B50 770#endif 771 772void 773embed_config(bd_t **bdp) 774{ 775 u_char *cp; 776 int i; 777 bd_t *bd, *treeboot_bd; 778 bd_t *(*get_board_info)(void) = 779 (bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR); 780#if !defined(CONFIG_STB03xxx) 781 782 /* shut down the Ethernet controller that the boot rom 783 * sometimes leaves running. 784 */ 785 mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */ 786 while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */ 787 out_be32((volatile u32*)EMAC0_BASE,0x20000000); /* then reset EMAC */ 788#endif 789 790 bd = &bdinfo; 791 *bdp = bd; 792 if ((treeboot_bd = get_board_info()) != NULL) { 793 memcpy(bd, treeboot_bd, sizeof(bd_t)); 794 } 795 else { 796 /* Hmmm...better try to stuff some defaults. 797 */ 798 bd->bi_memsize = 16 * 1024 * 1024; 799 cp = (u_char *)def_enet_addr; 800 for (i=0; i<6; i++) { 801 /* I should probably put different ones here, 802 * hopefully only one is used. 803 */ 804 bd->BD_EMAC_ADDR(0,i) = *cp; 805 806#ifdef CONFIG_PCI 807 bd->bi_pci_enetaddr[i] = *cp++; 808#endif 809 } 810 bd->bi_tbfreq = 200 * 1000 * 1000; 811 bd->bi_intfreq = 200000000; 812 bd->bi_busfreq = 100000000; 813#ifdef CONFIG_PCI 814 bd->bi_pci_busfreq = 66666666; 815#endif 816 } 817 /* Yeah, this look weird, but on Redwood 4 they are 818 * different object in the structure. Sincr Redwwood 5 819 * and Redwood 6 use OpenBIOS, it requires a special value. 820 */ 821#if defined(CONFIG_REDWOOD_5) || defined(CONFIG_REDWOOD_6) 822 bd->bi_tbfreq = 27 * 1000 * 1000; 823#endif 824 timebase_period_ns = 1000000000 / bd->bi_tbfreq; 825} 826#endif /* CONFIG_IBM_OPENBIOS */ 827 828#ifdef CONFIG_EP405 829#include <linux/serial_reg.h> 830 831void 832embed_config(bd_t **bdp) 833{ 834 u32 chcr0; 835 u_char *cp; 836 bd_t *bd; 837 838 /* Different versions of the PlanetCore firmware vary in how 839 they set up the serial port - in particular whether they 840 use the internal or external serial clock for UART0. Make 841 sure the UART is in a known state. */ 842 chcr0 = mfdcr(DCRN_CHCR0); 843 if ( (chcr0 & 0x1fff) != 0x103e ) { 844 mtdcr(DCRN_CHCR0, (chcr0 & 0xffffe000) | 0x103e); 845 /* The following tricks serial_init() into resetting the baud rate */ 846 writeb(0, UART0_IO_BASE + UART_LCR); 847 } 848 849 /* We haven't seen actual problems with the EP405 leaving the 850 * EMAC running (as we have on Walnut). But the registers 851 * suggest it may not be left completely quiescent. Reset it 852 * just to be sure. */ 853 mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */ 854 while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */ 855 out_be32((unsigned *)EMAC0_BASE,0x20000000); /* then reset EMAC */ 856 857 bd = &bdinfo; 858 *bdp = bd; 859 cp = (u_char *)0xF0000EE0; 860 for (;;) { 861 if (*cp == 'E') { 862 cp++; 863 if (*cp == 'A') { 864 cp += 2; 865 rpx_eth(bd, cp); 866 } 867 } 868 869 if (*cp == 'D') { 870 cp++; 871 if (*cp == '1') { 872 cp += 2; 873 rpx_memsize(bd, cp); 874 } 875 } 876 877 if (*cp == 'N') { 878 cp++; 879 if (*cp == 'V') { 880 cp += 2; 881 rpx_nvramsize(bd, cp); 882 } 883 } 884 while ((*cp != '\n') && (*cp != 0xff)) 885 cp++; 886 887 cp++; 888 if ((*cp == 0) || (*cp == 0xff)) 889 break; 890 } 891 bd->bi_intfreq = 200000000; 892 bd->bi_busfreq = 100000000; 893 bd->bi_pci_busfreq= 33000000 ; 894} 895#endif 896