Searched refs:ctrl_reg (Results 1 - 21 of 21) sorted by relevance

/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/misc/ibmasm/
H A Dlowlevel.h67 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; local
68 writel( readl(ctrl_reg) & ~mask, ctrl_reg);
73 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; local
74 writel( readl(ctrl_reg) | mask, ctrl_reg);
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/char/watchdog/
H A Dmachzwd.c189 unsigned int ctrl_reg = 0; local
197 ctrl_reg = zf_get_control();
198 ctrl_reg |= (ENABLE_WD1|ENABLE_WD2); /* disable wd1 and wd2 */
199 ctrl_reg &= ~(ENABLE_WD1|ENABLE_WD2);
200 zf_set_control(ctrl_reg);
212 unsigned int ctrl_reg = 0; local
228 ctrl_reg = zf_get_control();
229 ctrl_reg |= (ENABLE_WD1|zf_action);
230 zf_set_control(ctrl_reg);
239 unsigned int ctrl_reg local
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/pci/hotplug/
H A Dshpchp.h190 struct ctrl_reg { struct
208 BASE_OFFSET = offsetof(struct ctrl_reg, base_offset),
209 SLOT_AVAIL1 = offsetof(struct ctrl_reg, slot_avail1),
210 SLOT_AVAIL2 = offsetof(struct ctrl_reg, slot_avail2),
211 SLOT_CONFIG = offsetof(struct ctrl_reg, slot_config),
212 SEC_BUS_CONFIG = offsetof(struct ctrl_reg, sec_bus_config),
213 MSI_CTRL = offsetof(struct ctrl_reg, msi_ctrl),
214 PROG_INTERFACE = offsetof(struct ctrl_reg, prog_interface),
215 CMD = offsetof(struct ctrl_reg, cmd),
216 CMD_STATUS = offsetof(struct ctrl_reg, cmd_statu
[all...]
H A Dcpqphp.h121 struct ctrl_reg { /* offset */ struct
153 SLOT_RST = offsetof(struct ctrl_reg, slot_RST),
154 SLOT_ENABLE = offsetof(struct ctrl_reg, slot_enable),
155 MISC = offsetof(struct ctrl_reg, misc),
156 LED_CONTROL = offsetof(struct ctrl_reg, led_control),
157 INT_INPUT_CLEAR = offsetof(struct ctrl_reg, int_input_clear),
158 INT_MASK = offsetof(struct ctrl_reg, int_mask),
159 CTRL_RESERVED0 = offsetof(struct ctrl_reg, reserved0),
160 CTRL_RESERVED1 = offsetof(struct ctrl_reg, reserved1),
161 CTRL_RESERVED2 = offsetof(struct ctrl_reg, reserved
[all...]
H A Dpciehp_hpc.c76 struct ctrl_reg { struct
96 PCIECAPID = offsetof(struct ctrl_reg, cap_id),
97 NXTCAPPTR = offsetof(struct ctrl_reg, nxt_ptr),
98 CAPREG = offsetof(struct ctrl_reg, cap_reg),
99 DEVCAP = offsetof(struct ctrl_reg, dev_cap),
100 DEVCTRL = offsetof(struct ctrl_reg, dev_ctrl),
101 DEVSTATUS = offsetof(struct ctrl_reg, dev_status),
102 LNKCAP = offsetof(struct ctrl_reg, lnk_cap),
103 LNKCTRL = offsetof(struct ctrl_reg, lnk_ctrl),
104 LNKSTATUS = offsetof(struct ctrl_reg, lnk_statu
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/isdn/hisax/
H A Dnj_u.c86 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
87 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
89 cs->hw.njet.ctrl_reg = 0x40; /* Reset Off and status read clear */
91 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
178 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
179 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
182 cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */
183 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
H A Dnj_s.c103 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
104 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
109 cs->hw.njet.ctrl_reg = 0x40; /* Reset Off and status read clear */
111 cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */
112 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
213 cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
214 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
217 cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */
218 byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
H A Denternow_pci.c156 cs->hw.njet.ctrl_reg = 0x07;
157 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
160 cs->hw.njet.ctrl_reg = 0x30;
161 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
356 cs->hw.njet.ctrl_reg = 0x07; // ge�ndert von 0xff
357 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
361 cs->hw.njet.ctrl_reg = 0x30; /* Reset Off and status read clear */
362 outb(cs->hw.njet.ctrl_reg, cs->hw.njet.base + NETJET_CTRL);
H A Delsa.c471 cs->hw.elsa.ctrl_reg |= 0x50;
472 cs->hw.elsa.ctrl_reg &= ~ELSA_ISDN_RESET; /* Reset On */
473 byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
477 cs->hw.elsa.ctrl_reg |= ELSA_ISDN_RESET; /* Reset Off */
478 byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
615 cs->hw.elsa.ctrl_reg |= ELSA_STAT_LED;
617 cs->hw.elsa.ctrl_reg &= ~ELSA_STAT_LED;
619 cs->hw.elsa.ctrl_reg ^= ELSA_STAT_LED;
623 cs->hw.elsa.ctrl_reg |= ELSA_LINE_LED;
625 cs->hw.elsa.ctrl_reg
[all...]
H A Ddiva.c781 cs->hw.diva.ctrl_reg = 0; /* Reset On */
782 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
784 cs->hw.diva.ctrl_reg |= DIVA_RESET; /* Reset Off */
785 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
788 cs->hw.diva.ctrl_reg |= DIVA_ISA_LED_A;
791 cs->hw.diva.ctrl_reg |= DIVA_PCI_LED_A;
793 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
810 cs->hw.diva.ctrl_reg |= (DIVA_ISA == cs->subtyp) ?
813 cs->hw.diva.ctrl_reg ^= (DIVA_ISA == cs->subtyp) ?
818 cs->hw.diva.ctrl_reg |
[all...]
H A Dhisax.h568 u_char ctrl_reg; member in struct:elsa_hw
613 u_char ctrl_reg; member in struct:diva_hw
670 unsigned char ctrl_reg; member in struct:njet_hw
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/bluetooth/
H A Dbluecard_cs.c82 unsigned char ctrl_reg; member in struct:bluecard_info_t
268 info->ctrl_reg |= REG_CONTROL_RTS;
269 outb(info->ctrl_reg, iobase + REG_CONTROL);
313 info->ctrl_reg &= ~0x03;
314 info->ctrl_reg |= baud_reg;
315 outb(info->ctrl_reg, iobase + REG_CONTROL);
318 info->ctrl_reg &= ~REG_CONTROL_RTS;
319 outb(info->ctrl_reg, iobase + REG_CONTROL);
519 info->ctrl_reg &= ~REG_CONTROL_INTERRUPT;
520 outb(info->ctrl_reg, iobas
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/scsi/
H A Dfastlane.c62 #define ctrl_reg cond_reg /* DMA control (wo) [0x0000] */ macro
97 * to ctrl_reg. Always write a copy
115 dregs->ctrl_reg = ctrl_data;
281 dregs->ctrl_reg = ctrl_data;
302 dregs->ctrl_reg = ctrl_data;
321 dregs->ctrl_reg = ctrl_data & ~(FASTLANE_DMA_EDI|FASTLANE_DMA_ESI);
325 dregs->ctrl_reg = ctrl_data;
351 ((struct fastlane_dma_registers *)(esp->dregs))->ctrl_reg = ctrl_data;
357 ((struct fastlane_dma_registers *)(esp->dregs))->ctrl_reg = ctrl_data;
H A Dcyberstorm.c62 #define ctrl_reg cond_reg /* DMA control (wo) [0x402] */ macro
95 * to ctrl_reg. Always write a copy
250 dregs->ctrl_reg = ctrl_data;
269 dregs->ctrl_reg = ctrl_data;
293 ((struct cyber_dma_registers *)(esp->dregs))->ctrl_reg = ctrl_data;
299 ((struct cyber_dma_registers *)(esp->dregs))->ctrl_reg = ctrl_data;
H A DcyberstormII.c50 #define ctrl_reg cond_reg /* DMA control (wo) [0x000] */ macro
247 ((struct cyberII_dma_registers *)(esp->dregs))->ctrl_reg &= ~CYBERII_DMA_LED;
252 ((struct cyberII_dma_registers *)(esp->dregs))->ctrl_reg |= CYBERII_DMA_LED;
H A Dadvansys.c9731 uchar ctrl_reg; local
9759 ctrl_reg = AscGetChipControl(iop_base);
9760 saved_ctrl_reg = ctrl_reg & (~(CC_SCSI_RESET | CC_CHIP_RESET |
9792 (ctrl_reg & CC_SINGLE_STEP)) {
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/ixgb/
H A Dixgb_hw.c67 uint32_t ctrl_reg; local
69 ctrl_reg = IXGB_CTRL0_RST |
79 IXGB_WRITE_REG_IO(hw, CTRL0, ctrl_reg);
81 IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);
86 ctrl_reg = IXGB_READ_REG(hw, CTRL0);
89 ASSERT(!(ctrl_reg & IXGB_CTRL0_RST));
96 return ctrl_reg;
107 uint32_t ctrl_reg; local
144 ctrl_reg = ixgb_mac_reset(hw);
153 return (ctrl_reg
279 uint32_t ctrl_reg; local
649 uint32_t ctrl_reg; local
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pic.c290 u32 ctrl_reg; local
292 ctrl_reg = in_be32(&intr->ctrl);
293 type = (ctrl_reg >> (22 - irq * 2)) & 0x3;
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/net/e1000/
H A De1000_ethtool.c1208 uint32_t ctrl_reg; local
1213 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1214 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1220 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1275 uint32_t ctrl_reg = 0; local
1293 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1300 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1301 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1310 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1311 ctrl_reg
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/video/
H A Dsm501fb.c640 void __iomem *ctrl_reg = fbi->regs + SM501_DC_PANEL_CONTROL; local
642 control = readl(ctrl_reg);
648 writel(control, ctrl_reg);
653 writel(control, ctrl_reg);
658 writel(control, ctrl_reg);
663 writel(control, ctrl_reg);
669 writel(control, ctrl_reg);
674 writel(control, ctrl_reg);
679 writel(control, ctrl_reg);
684 writel(control, ctrl_reg);
[all...]
/netgear-WNDR4500v2-V1.0.0.60_1.0.38/src/linux/linux-2.6/drivers/atm/
H A Diphase.c2285 static u32 ctrl_reg; local
2288 ctrl_reg = readl(ia_dev[i]->reg+IPHASE5575_BUS_CONTROL_REG);
2291 ctrl_reg &= (~CTRL_LED);
2292 writel(ctrl_reg, ia_dev[i]->reg+IPHASE5575_BUS_CONTROL_REG);
2297 ctrl_reg |= CTRL_LED;
2298 writel(ctrl_reg, ia_dev[i]->reg+IPHASE5575_BUS_CONTROL_REG);
2354 u32 ctrl_reg; local
2381 ctrl_reg = readl(iadev->reg+IPHASE5575_BUS_CONTROL_REG);
2382 ctrl_reg = (ctrl_reg
[all...]

Completed in 241 milliseconds