1/* cyberstormII.c: Driver for CyberStorm SCSI Mk II
2 *
3 * Copyright (C) 1996 Jesper Skov (jskov@cygnus.co.uk)
4 *
5 * This driver is based on cyberstorm.c
6 */
7
8/* TODO:
9 *
10 * 1) Figure out how to make a cleaner merge with the sparc driver with regard
11 *    to the caches and the Sparc MMU mapping.
12 * 2) Make as few routines required outside the generic driver. A lot of the
13 *    routines in this file used to be inline!
14 */
15
16#include <linux/module.h>
17
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/delay.h>
21#include <linux/types.h>
22#include <linux/string.h>
23#include <linux/slab.h>
24#include <linux/blkdev.h>
25#include <linux/proc_fs.h>
26#include <linux/stat.h>
27#include <linux/interrupt.h>
28
29#include "scsi.h"
30#include <scsi/scsi_host.h>
31#include "NCR53C9x.h"
32
33#include <linux/zorro.h>
34#include <asm/irq.h>
35#include <asm/amigaints.h>
36#include <asm/amigahw.h>
37
38#include <asm/pgtable.h>
39
40/* The controller registers can be found in the Z2 config area at these
41 * offsets:
42 */
43#define CYBERII_ESP_ADDR 0x1ff03
44#define CYBERII_DMA_ADDR 0x1ff43
45
46
47/* The CyberStorm II DMA interface */
48struct cyberII_dma_registers {
49	volatile unsigned char cond_reg;        /* DMA cond    (ro)  [0x000] */
50#define ctrl_reg  cond_reg			/* DMA control (wo)  [0x000] */
51	unsigned char dmapad4[0x3f];
52	volatile unsigned char dma_addr0;	/* DMA address (MSB) [0x040] */
53	unsigned char dmapad1[3];
54	volatile unsigned char dma_addr1;	/* DMA address       [0x044] */
55	unsigned char dmapad2[3];
56	volatile unsigned char dma_addr2;	/* DMA address       [0x048] */
57	unsigned char dmapad3[3];
58	volatile unsigned char dma_addr3;	/* DMA address (LSB) [0x04c] */
59};
60
61/* DMA control bits */
62#define CYBERII_DMA_LED    0x02	/* HD led control 1 = on */
63
64static int  dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
65static int  dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
66static void dma_dump_state(struct NCR_ESP *esp);
67static void dma_init_read(struct NCR_ESP *esp, __u32 addr, int length);
68static void dma_init_write(struct NCR_ESP *esp, __u32 addr, int length);
69static void dma_ints_off(struct NCR_ESP *esp);
70static void dma_ints_on(struct NCR_ESP *esp);
71static int  dma_irq_p(struct NCR_ESP *esp);
72static void dma_led_off(struct NCR_ESP *esp);
73static void dma_led_on(struct NCR_ESP *esp);
74static int  dma_ports_p(struct NCR_ESP *esp);
75static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
76
77static volatile unsigned char cmd_buffer[16];
78				/* This is where all commands are put
79				 * before they are transferred to the ESP chip
80				 * via PIO.
81				 */
82
83/***************************************************************** Detection */
84int __init cyberII_esp_detect(struct scsi_host_template *tpnt)
85{
86	struct NCR_ESP *esp;
87	struct zorro_dev *z = NULL;
88	unsigned long address;
89	struct ESP_regs *eregs;
90
91	if ((z = zorro_find_device(ZORRO_PROD_PHASE5_CYBERSTORM_MK_II, z))) {
92	    unsigned long board = z->resource.start;
93	    if (request_mem_region(board+CYBERII_ESP_ADDR,
94				   sizeof(struct ESP_regs), "NCR53C9x")) {
95		/* Do some magic to figure out if the CyberStorm Mk II
96		 * is equipped with a SCSI controller
97		 */
98		address = (unsigned long)ZTWO_VADDR(board);
99		eregs = (struct ESP_regs *)(address + CYBERII_ESP_ADDR);
100
101		esp = esp_allocate(tpnt, (void *)board + CYBERII_ESP_ADDR, 0);
102
103		esp_write(eregs->esp_cfg1, (ESP_CONFIG1_PENABLE | 7));
104		udelay(5);
105		if(esp_read(eregs->esp_cfg1) != (ESP_CONFIG1_PENABLE | 7)) {
106			esp_deallocate(esp);
107			scsi_unregister(esp->ehost);
108			release_mem_region(board+CYBERII_ESP_ADDR,
109					   sizeof(struct ESP_regs));
110			return 0; /* Bail out if address did not hold data */
111		}
112
113		/* Do command transfer with programmed I/O */
114		esp->do_pio_cmds = 1;
115
116		/* Required functions */
117		esp->dma_bytes_sent = &dma_bytes_sent;
118		esp->dma_can_transfer = &dma_can_transfer;
119		esp->dma_dump_state = &dma_dump_state;
120		esp->dma_init_read = &dma_init_read;
121		esp->dma_init_write = &dma_init_write;
122		esp->dma_ints_off = &dma_ints_off;
123		esp->dma_ints_on = &dma_ints_on;
124		esp->dma_irq_p = &dma_irq_p;
125		esp->dma_ports_p = &dma_ports_p;
126		esp->dma_setup = &dma_setup;
127
128		/* Optional functions */
129		esp->dma_barrier = 0;
130		esp->dma_drain = 0;
131		esp->dma_invalidate = 0;
132		esp->dma_irq_entry = 0;
133		esp->dma_irq_exit = 0;
134		esp->dma_led_on = &dma_led_on;
135		esp->dma_led_off = &dma_led_off;
136		esp->dma_poll = 0;
137		esp->dma_reset = 0;
138
139		/* SCSI chip speed */
140		esp->cfreq = 40000000;
141
142		/* The DMA registers on the CyberStorm are mapped
143		 * relative to the device (i.e. in the same Zorro
144		 * I/O block).
145		 */
146		esp->dregs = (void *)(address + CYBERII_DMA_ADDR);
147
148		/* ESP register base */
149		esp->eregs = eregs;
150
151		/* Set the command buffer */
152		esp->esp_command = cmd_buffer;
153		esp->esp_command_dvma = virt_to_bus((void *)cmd_buffer);
154
155		esp->irq = IRQ_AMIGA_PORTS;
156		request_irq(IRQ_AMIGA_PORTS, esp_intr, IRQF_SHARED,
157			    "CyberStorm SCSI Mk II", esp->ehost);
158
159		/* Figure out our scsi ID on the bus */
160		esp->scsi_id = 7;
161
162		/* We don't have a differential SCSI-bus. */
163		esp->diff = 0;
164
165		esp_initialize(esp);
166
167		printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps, esps_in_use);
168		esps_running = esps_in_use;
169		return esps_in_use;
170	    }
171	}
172	return 0;
173}
174
175/************************************************************* DMA Functions */
176static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
177{
178	return fifo_count;
179}
180
181static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
182{
183	/* I don't think there's any limit on the CyberDMA. So we use what
184	 * the ESP chip can handle (24 bit).
185	 */
186	unsigned long sz = sp->SCp.this_residual;
187	if(sz > 0x1000000)
188		sz = 0x1000000;
189	return sz;
190}
191
192static void dma_dump_state(struct NCR_ESP *esp)
193{
194	ESPLOG(("esp%d: dma -- cond_reg<%02x>\n",
195		esp->esp_id, ((struct cyberII_dma_registers *)
196			      (esp->dregs))->cond_reg));
197	ESPLOG(("intreq:<%04x>, intena:<%04x>\n",
198		amiga_custom.intreqr, amiga_custom.intenar));
199}
200
201static void dma_init_read(struct NCR_ESP *esp, __u32 addr, int length)
202{
203	struct cyberII_dma_registers *dregs =
204		(struct cyberII_dma_registers *) esp->dregs;
205
206	cache_clear(addr, length);
207
208	addr &= ~(1);
209	dregs->dma_addr0 = (addr >> 24) & 0xff;
210	dregs->dma_addr1 = (addr >> 16) & 0xff;
211	dregs->dma_addr2 = (addr >>  8) & 0xff;
212	dregs->dma_addr3 = (addr      ) & 0xff;
213}
214
215static void dma_init_write(struct NCR_ESP *esp, __u32 addr, int length)
216{
217	struct cyberII_dma_registers *dregs =
218		(struct cyberII_dma_registers *) esp->dregs;
219
220	cache_push(addr, length);
221
222	addr |= 1;
223	dregs->dma_addr0 = (addr >> 24) & 0xff;
224	dregs->dma_addr1 = (addr >> 16) & 0xff;
225	dregs->dma_addr2 = (addr >>  8) & 0xff;
226	dregs->dma_addr3 = (addr      ) & 0xff;
227}
228
229static void dma_ints_off(struct NCR_ESP *esp)
230{
231	disable_irq(esp->irq);
232}
233
234static void dma_ints_on(struct NCR_ESP *esp)
235{
236	enable_irq(esp->irq);
237}
238
239static int dma_irq_p(struct NCR_ESP *esp)
240{
241	/* It's important to check the DMA IRQ bit in the correct way! */
242	return (esp_read(esp->eregs->esp_status) & ESP_STAT_INTR);
243}
244
245static void dma_led_off(struct NCR_ESP *esp)
246{
247	((struct cyberII_dma_registers *)(esp->dregs))->ctrl_reg &= ~CYBERII_DMA_LED;
248}
249
250static void dma_led_on(struct NCR_ESP *esp)
251{
252	((struct cyberII_dma_registers *)(esp->dregs))->ctrl_reg |= CYBERII_DMA_LED;
253}
254
255static int dma_ports_p(struct NCR_ESP *esp)
256{
257	return ((amiga_custom.intenar) & IF_PORTS);
258}
259
260static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
261{
262	/* On the Sparc, DMA_ST_WRITE means "move data from device to memory"
263	 * so when (write) is true, it actually means READ!
264	 */
265	if(write){
266		dma_init_read(esp, addr, count);
267	} else {
268		dma_init_write(esp, addr, count);
269	}
270}
271
272#define HOSTS_C
273
274int cyberII_esp_release(struct Scsi_Host *instance)
275{
276#ifdef MODULE
277	unsigned long address = (unsigned long)((struct NCR_ESP *)instance->hostdata)->edev;
278
279	esp_deallocate((struct NCR_ESP *)instance->hostdata);
280	esp_release();
281	release_mem_region(address, sizeof(struct ESP_regs));
282	free_irq(IRQ_AMIGA_PORTS, esp_intr);
283#endif
284	return 1;
285}
286
287
288static struct scsi_host_template driver_template = {
289	.proc_name		= "esp-cyberstormII",
290	.proc_info		= esp_proc_info,
291	.name			= "CyberStorm Mk II SCSI",
292	.detect			= cyberII_esp_detect,
293	.slave_alloc		= esp_slave_alloc,
294	.slave_destroy		= esp_slave_destroy,
295	.release		= cyberII_esp_release,
296	.queuecommand		= esp_queue,
297	.eh_abort_handler	= esp_abort,
298	.eh_bus_reset_handler	= esp_reset,
299	.can_queue		= 7,
300	.this_id		= 7,
301	.sg_tablesize		= SG_ALL,
302	.cmd_per_lun		= 1,
303	.use_clustering		= ENABLE_CLUSTERING
304};
305
306
307#include "scsi_module.c"
308
309MODULE_LICENSE("GPL");
310