Searched refs:bfin_write16 (Results 1 - 15 of 15) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf548/
H A DcdefBF544.h50 #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val)
58 #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val)
66 #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val)
77 #define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val)
79 #define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val)
86 #define bfin_write_EPPI0_STATUS(val) bfin_write16(EPPI0_STATUS, val)
88 #define bfin_write_EPPI0_HCOUNT(val) bfin_write16(EPPI0_HCOUNT, val)
90 #define bfin_write_EPPI0_HDELAY(val) bfin_write16(EPPI0_HDELAY, val)
92 #define bfin_write_EPPI0_VCOUNT(val) bfin_write16(EPPI0_VCOUNT, val)
94 #define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELA
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H A DcdefBF542.h50 #define bfin_write_ATAPI_CONTROL(val) bfin_write16(ATAPI_CONTROL, val)
52 #define bfin_write_ATAPI_STATUS(val) bfin_write16(ATAPI_STATUS, val)
54 #define bfin_write_ATAPI_DEV_ADDR(val) bfin_write16(ATAPI_DEV_ADDR, val)
56 #define bfin_write_ATAPI_DEV_TXBUF(val) bfin_write16(ATAPI_DEV_TXBUF, val)
58 #define bfin_write_ATAPI_DEV_RXBUF(val) bfin_write16(ATAPI_DEV_RXBUF, val)
60 #define bfin_write_ATAPI_INT_MASK(val) bfin_write16(ATAPI_INT_MASK, val)
62 #define bfin_write_ATAPI_INT_STATUS(val) bfin_write16(ATAPI_INT_STATUS, val)
64 #define bfin_write_ATAPI_XFER_LEN(val) bfin_write16(ATAPI_XFER_LEN, val)
66 #define bfin_write_ATAPI_LINE_STATUS(val) bfin_write16(ATAPI_LINE_STATUS, val)
68 #define bfin_write_ATAPI_SM_STATE(val) bfin_write16(ATAPI_SM_STAT
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H A DcdefBF549.h50 #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val)
58 #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val)
66 #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val)
77 #define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val)
79 #define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val)
86 #define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val)
88 #define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val)
90 #define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val)
92 #define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val)
98 #define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR
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H A DcdefBF54x_base.h43 #define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL, val)
45 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val)
47 #define bfin_write_VR_CTL(val) bfin_write16(VR_CTL, val)
49 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val)
51 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val)
61 #define bfin_write_SWRST(val) bfin_write16(SWRST, val)
63 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)
113 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val)
124 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL, val)
126 #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTA
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H A DcdefBF548.h50 #define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val)
58 #define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val)
66 #define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val)
77 #define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val)
79 #define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val)
86 #define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val)
88 #define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val)
90 #define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val)
92 #define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val)
98 #define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf537/
H A DcdefBF534.h45 #define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL,val)
47 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val)
59 bfin_write16(VR_CTL, val);
68 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val)
70 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val)
75 #define bfin_write_SWRST(val) bfin_write16(SWRST,val)
77 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val)
97 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL,val)
107 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL,val)
109 #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTA
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H A Dbfin_serial_5xx.h28 #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
29 #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
30 #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
31 #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
32 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
33 #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
130 bfin_write16(BFIN_PORT_MUX, val);
134 bfin_write16(PORTF_FER, val);
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf527/
H A DcdefBF525.h51 #define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val)
53 #define bfin_write_USB_POWER(val) bfin_write16(USB_POWER, val)
55 #define bfin_write_USB_INTRTX(val) bfin_write16(USB_INTRTX, val)
57 #define bfin_write_USB_INTRRX(val) bfin_write16(USB_INTRRX, val)
59 #define bfin_write_USB_INTRTXE(val) bfin_write16(USB_INTRTXE, val)
61 #define bfin_write_USB_INTRRXE(val) bfin_write16(USB_INTRRXE, val)
63 #define bfin_write_USB_INTRUSB(val) bfin_write16(USB_INTRUSB, val)
65 #define bfin_write_USB_INTRUSBE(val) bfin_write16(USB_INTRUSBE, val)
67 #define bfin_write_USB_FRAME(val) bfin_write16(USB_FRAME, val)
69 #define bfin_write_USB_INDEX(val) bfin_write16(USB_INDE
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H A DcdefBF527.h216 #define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val)
218 #define bfin_write_USB_POWER(val) bfin_write16(USB_POWER, val)
220 #define bfin_write_USB_INTRTX(val) bfin_write16(USB_INTRTX, val)
222 #define bfin_write_USB_INTRRX(val) bfin_write16(USB_INTRRX, val)
224 #define bfin_write_USB_INTRTXE(val) bfin_write16(USB_INTRTXE, val)
226 #define bfin_write_USB_INTRRXE(val) bfin_write16(USB_INTRRXE, val)
228 #define bfin_write_USB_INTRUSB(val) bfin_write16(USB_INTRUSB, val)
230 #define bfin_write_USB_INTRUSBE(val) bfin_write16(USB_INTRUSBE, val)
232 #define bfin_write_USB_FRAME(val) bfin_write16(USB_FRAME, val)
234 #define bfin_write_USB_INDEX(val) bfin_write16(USB_INDE
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H A DcdefBF52x_base.h39 #define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL, val)
41 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val)
43 #define bfin_write_VR_CTL(val) bfin_write16(VR_CTL, val)
45 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val)
47 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val)
49 #define bfin_write_CHIPID(val) bfin_write16(CHIPID, val)
54 #define bfin_write_SWRST(val) bfin_write16(SWRST, val)
56 #define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)
106 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val)
117 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICT
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf533/
H A DcdefBF532.h48 #define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL,val)
50 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val)
52 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val)
55 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val)
67 bfin_write16(VR_CTL, val);
78 #define bfin_write_SWRST(val) bfin_write16(SWRST,val)
80 #define bfin_write_SYSCR(val) bfin_write16(SYSCR,val)
98 #define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL,val)
108 #define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL,val)
110 #define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTA
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H A Dbfin_serial_5xx.h28 #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
29 #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
30 #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
31 #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
32 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
33 #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf561/
H A DcdefBF561.h53 #define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL,val)
55 #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV,val)
67 bfin_write16(VR_CTL, val);
76 #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val)
78 #define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT,val)
83 #define bfin_write_SICA_SWRST(val) bfin_write16(SICA_SWRST,val)
85 #define bfin_write_SICA_SYSCR(val) bfin_write16(SICA_SYSCR,val)
87 #define bfin_write_SICA_RVECT(val) bfin_write16(SICA_RVECT,val)
121 #define bfin_write_SICB_SWRST(val) bfin_write16(SICB_SWRST,val)
123 #define bfin_write_SICB_SYSCR(val) bfin_write16(SICB_SYSC
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H A Dbfin_serial_5xx.h28 #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v)
29 #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v)
30 #define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v)
31 #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v)
32 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
33 #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v)
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-common/
H A Ddef_LPBlackfin.h66 #define bfin_write16(addr,val) ({\ macro
99 #define bfin_write16(addr,val) ({\ macro

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