Searched refs:bfin_read16 (Results 1 - 16 of 16) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf548/
H A DcdefBF544.h49 #define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)
57 #define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)
65 #define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)
76 #define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)
78 #define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)
85 #define bfin_read_EPPI0_STATUS() bfin_read16(EPPI0_STATUS)
87 #define bfin_read_EPPI0_HCOUNT() bfin_read16(EPPI0_HCOUNT)
89 #define bfin_read_EPPI0_HDELAY() bfin_read16(EPPI0_HDELAY)
91 #define bfin_read_EPPI0_VCOUNT() bfin_read16(EPPI0_VCOUNT)
93 #define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELA
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H A DcdefBF542.h49 #define bfin_read_ATAPI_CONTROL() bfin_read16(ATAPI_CONTROL)
51 #define bfin_read_ATAPI_STATUS() bfin_read16(ATAPI_STATUS)
53 #define bfin_read_ATAPI_DEV_ADDR() bfin_read16(ATAPI_DEV_ADDR)
55 #define bfin_read_ATAPI_DEV_TXBUF() bfin_read16(ATAPI_DEV_TXBUF)
57 #define bfin_read_ATAPI_DEV_RXBUF() bfin_read16(ATAPI_DEV_RXBUF)
59 #define bfin_read_ATAPI_INT_MASK() bfin_read16(ATAPI_INT_MASK)
61 #define bfin_read_ATAPI_INT_STATUS() bfin_read16(ATAPI_INT_STATUS)
63 #define bfin_read_ATAPI_XFER_LEN() bfin_read16(ATAPI_XFER_LEN)
65 #define bfin_read_ATAPI_LINE_STATUS() bfin_read16(ATAPI_LINE_STATUS)
67 #define bfin_read_ATAPI_SM_STATE() bfin_read16(ATAPI_SM_STAT
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H A DcdefBF549.h49 #define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)
57 #define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)
65 #define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)
76 #define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)
78 #define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)
85 #define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1)
87 #define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2)
89 #define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV)
91 #define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV)
97 #define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR
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H A DcdefBF54x_base.h42 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
44 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
46 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
48 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
50 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
60 #define bfin_read_SWRST() bfin_read16(SWRST)
62 #define bfin_read_SYSCR() bfin_read16(SYSCR)
112 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
123 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
125 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTA
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H A DcdefBF548.h49 #define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)
57 #define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)
65 #define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)
76 #define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)
78 #define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)
85 #define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1)
87 #define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2)
89 #define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV)
91 #define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV)
97 #define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf537/
H A DcdefBF534.h44 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
46 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
48 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
67 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
69 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
74 #define bfin_read_SWRST() bfin_read16(SWRST)
76 #define bfin_read_SYSCR() bfin_read16(SYSCR)
96 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
106 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
108 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTA
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H A Dbfin_serial_5xx.h19 #define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
20 #define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
21 #define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
22 #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
23 #define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
24 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
26 #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
128 val = bfin_read16(BFIN_PORT_MUX);
132 val = bfin_read16(PORTF_FE
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf527/
H A DcdefBF525.h50 #define bfin_read_USB_FADDR() bfin_read16(USB_FADDR)
52 #define bfin_read_USB_POWER() bfin_read16(USB_POWER)
54 #define bfin_read_USB_INTRTX() bfin_read16(USB_INTRTX)
56 #define bfin_read_USB_INTRRX() bfin_read16(USB_INTRRX)
58 #define bfin_read_USB_INTRTXE() bfin_read16(USB_INTRTXE)
60 #define bfin_read_USB_INTRRXE() bfin_read16(USB_INTRRXE)
62 #define bfin_read_USB_INTRUSB() bfin_read16(USB_INTRUSB)
64 #define bfin_read_USB_INTRUSBE() bfin_read16(USB_INTRUSBE)
66 #define bfin_read_USB_FRAME() bfin_read16(USB_FRAME)
68 #define bfin_read_USB_INDEX() bfin_read16(USB_INDE
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H A DcdefBF527.h215 #define bfin_read_USB_FADDR() bfin_read16(USB_FADDR)
217 #define bfin_read_USB_POWER() bfin_read16(USB_POWER)
219 #define bfin_read_USB_INTRTX() bfin_read16(USB_INTRTX)
221 #define bfin_read_USB_INTRRX() bfin_read16(USB_INTRRX)
223 #define bfin_read_USB_INTRTXE() bfin_read16(USB_INTRTXE)
225 #define bfin_read_USB_INTRRXE() bfin_read16(USB_INTRRXE)
227 #define bfin_read_USB_INTRUSB() bfin_read16(USB_INTRUSB)
229 #define bfin_read_USB_INTRUSBE() bfin_read16(USB_INTRUSBE)
231 #define bfin_read_USB_FRAME() bfin_read16(USB_FRAME)
233 #define bfin_read_USB_INDEX() bfin_read16(USB_INDE
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H A DcdefBF52x_base.h38 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
40 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
42 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
44 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
46 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
48 #define bfin_read_CHIPID() bfin_read16(CHIPID)
53 #define bfin_read_SWRST() bfin_read16(SWRST)
55 #define bfin_read_SYSCR() bfin_read16(SYSCR)
105 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
116 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICT
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/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf533/
H A DcdefBF532.h47 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
49 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
51 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
54 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
56 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
77 #define bfin_read_SWRST() bfin_read16(SWRST)
79 #define bfin_read_SYSCR() bfin_read16(SYSCR)
97 #define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
107 #define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
109 #define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTA
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H A Dbfin_serial_5xx.h19 #define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
20 #define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
21 #define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
22 #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
23 #define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
24 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
26 #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf561/
H A DcdefBF561.h52 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
54 #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
56 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
75 #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
77 #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
82 #define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST)
84 #define bfin_read_SICA_SYSCR() bfin_read16(SICA_SYSCR)
86 #define bfin_read_SICA_RVECT() bfin_read16(SICA_RVECT)
120 #define bfin_read_SICB_SWRST() bfin_read16(SICB_SWRST)
122 #define bfin_read_SICB_SYSCR() bfin_read16(SICB_SYSC
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H A Dbfin_serial_5xx.h19 #define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
20 #define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
21 #define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER))
22 #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
23 #define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR))
24 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR))
26 #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL))
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/blackfin/mach-bf537/boards/
H A Deth_mac.c35 *(u16 *)(&(addr[4])) = bfin_read16(flash_mac);
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-common/
H A Ddef_LPBlackfin.h51 #define bfin_read16(addr) ({ unsigned __v; \ macro
84 #define bfin_read16(addr) ({ unsigned __v; \ macro

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