Searched refs:BIT3 (Results 1 - 8 of 8) sorted by relevance
| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/scsi/ |
| H A D | tmscsim.h | 190 #define BIT3 0x00000008 macro
199 #define UNIT_RETRY BIT3
211 #define SRB_MSGIN BIT3
228 #define UNDER_RUN BIT3
290 #define WIDE_NEGO_DONE BIT3 /* Not used ;-) */
345 #define SEND_START_ BIT3
352 #define ACTIVE_NEGATION BIT3
402 #define GROUP_CODE_VALID BIT3
411 #define SUCCESSFUL_OP BIT3
417 #define SYNC_OFFSET_FLAG BIT3
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| H A D | dc395x.h | 69 #define BIT3 0x00000008 macro
78 #define UNIT_RETRY BIT3
128 #define UNDER_RUN BIT3
173 #define WIDE_NEGO_DONE BIT3
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-arm/arch-integrator/ |
| H A D | bits.h | 29 #define BIT3 0x00000008 macro
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/linux/ |
| H A D | synclink.h | 23 #define BIT3 0x0008 macro
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/char/pcmcia/ |
| H A D | synclink_cs.c | 326 #define PVR_AUTOCTS BIT3
751 #define CMD_TXFIFO BIT3 // release current tx FIFO
1262 if (gis & (BIT3 + BIT2))
3319 val |= BIT3;
3328 val |= BIT4 + BIT3;
3459 set_reg_bits(info, CHA + PVR, BIT3);
3461 clear_reg_bits(info, CHA + PVR, BIT3);
3496 clear_reg_bits(info, CHA + MODE, BIT3);
3513 set_reg_bits(info, CHA + MODE, BIT3);
3729 val |= BIT3;
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/char/ |
| H A D | synclink.c | 513 #define TRANSMIT_STATUS BIT3
530 #define RXSTATUS_CRC_ERROR BIT3
531 #define RXSTATUS_FRAMING_ERROR BIT3
570 #define TXSTATUS_CRC_SENT BIT3
590 #define MISCSTATUS_RCC_UNDERRUN BIT3
616 #define SICR_RCC_UNDERFLOW BIT3
650 #define TXSTATUS_CRC_SENT BIT3
1478 usc_OutReg( info, RICR+LSBONLY, (u16)(usc_InReg(info, RICR+LSBONLY) & ~BIT3 ));
1606 * BIT3 EOA/EOL End of List, all receive buffers in receive
1636 if ( status & BIT3 ) {
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| H A D | synclinkmp.c | 437 #define CCTS BIT3
453 #define OVRN BIT3
1605 RegValue |= BIT3;
1607 RegValue &= ~BIT3;
2668 if (status & BIT3 << shift)
2677 if (dmastatus & BIT3 << shift)
4453 case 6: RegValue |= BIT5 + BIT3; break;
4454 case 5: RegValue |= BIT5 + BIT4 + BIT3 + BIT2; break;
4623 RegValue |= BIT3;
4785 if (!(status & BIT3))
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| H A D | synclink_gt.c | 2249 if (status & (BIT5 + BIT4 + BIT3)) {
2676 wr_reg16(info, RCR, rd_reg16(info, RCR) | BIT3);
4013 val |= BIT3;
4243 val |= BIT3; /* 010, rxclk = BRG */
4356 if (status & BIT3)
4396 val |= BIT3;
4413 val |= BIT3;
4415 val &= ~BIT3;
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