Lines Matching refs:BIT3
513 #define TRANSMIT_STATUS BIT3
530 #define RXSTATUS_CRC_ERROR BIT3
531 #define RXSTATUS_FRAMING_ERROR BIT3
570 #define TXSTATUS_CRC_SENT BIT3
590 #define MISCSTATUS_RCC_UNDERRUN BIT3
616 #define SICR_RCC_UNDERFLOW BIT3
650 #define TXSTATUS_CRC_SENT BIT3
1478 usc_OutReg( info, RICR+LSBONLY, (u16)(usc_InReg(info, RICR+LSBONLY) & ~BIT3 ));
1606 * BIT3 EOA/EOL End of List, all receive buffers in receive
1636 if ( status & BIT3 ) {
5096 usc_OutReg(info, SICR, (u16)(usc_InReg(info,SICR) | BIT3));
5489 usc_OutDmaReg( info, RDIAR, BIT3 + BIT2 );
5578 usc_OutDmaReg( info, RDIAR, BIT3 + BIT2 );
5684 usc_OutDmaReg( info, TDIAR, BIT2|BIT3 );
5961 RegValue |= BIT4+BIT3+BIT2;
6018 RegValue |= BIT4+BIT3+BIT2;
6165 if (usc_InReg( info, RCSR ) & (BIT8 + BIT4 + BIT3 + BIT1))
7373 if ( status & (BIT8 + BIT3 + BIT1) ) {