/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/kw_family/cpu/ |
H A D | mvCpu.c | 226 MV_U32 regVal = MV_REG_READ(CPU_L2_CONFIG_REG); local 227 if (regVal & BIT2) 235 MV_U32 regVal = 0; local 236 __asm volatile ("mrc p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */ 237 if (regVal & BIT22) 245 MV_U32 regVal = 0; local 246 __asm volatile ("mrc p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Read Marvell extra features register */ 247 if (regVal & BIT24) 255 MV_U32 regVal = 0; local 256 __asm volatile ("mrc p15, 1, %0, c15, c1, 0" : "=r" (regVal)); /* Rea 265 MV_U32 regVal = 0; local 275 MV_U32 regVal = 0; local [all...] |
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/ |
H A D | mvGpp.c | 216 MV_U32 regVal; local 223 regVal = MV_REG_READ(GPP_DATA_IN_POL_REG(group)); 225 return (regVal & mask);
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/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci/ |
H A D | mvPci.c | 116 MV_U32 locBusNum, locDevNum, regVal; local 136 regVal = mvPciConfigRead (pciIf, locBusNum, locDevNum, 0, PCIX_COMMAND); 139 regVal &= 0xff8fffff; 142 regVal |= (0x3 << 20); 145 mvPciConfigWrite (pciIf, locBusNum, locDevNum, 0, PCIX_COMMAND, regVal); 388 MV_U32 regVal; local 398 regVal = MV_REG_READ(PCI_ARBITER_CTRL_REG(pciIf)); 403 regVal &= ~PCI_ARBITER_CTRL_DEFAULT_MASK; 405 regVal |= PCI_ARBITER_CTRL_DEFAULT; /* Set default configuration */ 409 regVal | 417 MV_REG_WRITE(PCI_ARBITER_CTRL_REG(pciIf), regVal); local [all...] |
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pex/ |
H A D | mvPex.c | 79 MV_U32 regVal; local 102 regVal = MV_REG_READ(0x41b00); /* Extract the data */ 105 regVal &= ~0x7; /* Clear bits [2:0] */ 106 regVal |= 0x4; /* Set the new value */ 107 regVal &= ~0x80000000; /* Set "write" command */ 108 MV_REG_WRITE(0x41b00, regVal); /* Write the write command */ 119 regVal = MV_REG_READ(0x41b00); /* Extract the data */ 120 regVal |= (BIT0 | BIT3); 121 regVal &= ~0x80000000; /* Set "write" command */ 122 MV_REG_WRITE(0x41b00, regVal); /* Writ [all...] |
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/ |
H A D | mvSysAudio.c | 288 MV_U32 regVal = MV_REG_READ(MV_AUDIO_WIN_CTRL_REG(winNum)); local 289 regVal &= ~MV_AUDIO_WIN_ENABLE_MASK; 290 MV_REG_WRITE(MV_AUDIO_WIN_CTRL_REG(winNum), regVal); local
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H A D | mvSysSata.c | 386 MV_U32 regVal = MV_REG_READ(MV_SATA_WIN_CTRL_REG(0, winNum)); local 387 regVal &= ~MV_SATA_WIN_ENABLE_MASK; 388 MV_REG_WRITE(MV_SATA_WIN_CTRL_REG(0, winNum), regVal);
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H A D | mvSysSdmmc.c | 383 MV_U32 regVal = MV_REG_READ(MV_SDMMC_WIN_CTRL_REG(0, winNum)); local 384 regVal &= ~MV_SDMMC_WIN_ENABLE_MASK; 385 MV_REG_WRITE(MV_SDMMC_WIN_CTRL_REG(0, winNum), regVal);
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H A D | mvCpuIf.c | 113 MV_U32 regVal; local 130 regVal = MV_REG_READ(CPU_CONFIG_REG); 131 regVal &= ~CPU_CONFIG_DEFAULT_MASK; 132 regVal |= CPU_CONFIG_DEFAULT; 133 MV_REG_WRITE(CPU_CONFIG_REG,regVal);
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H A D | mvSysGbe.c | 134 MV_U32 winNum, status, winPrioIndex=0, i, regVal=0; local 155 regVal |= MV_BIT_MASK(winNum); 157 MV_REG_WRITE(ETH_BASE_ADDR_ENABLE_REG(port), regVal); local
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/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/eth/gbe/ |
H A D | mvEth.c | 1105 MV_U32 regVal; local 1107 regVal = MV_REG_READ(ETH_TX_FIFO_URGENT_THRESH_REG(pPortCtrl->portNo)); 1108 regVal &= ~ETH_TX_INTR_COAL_ALL_MASK; 1109 regVal |= ETH_TX_INTR_COAL_MASK(coal); 1112 MV_REG_WRITE (ETH_TX_FIFO_URGENT_THRESH_REG(pPortCtrl->portNo), regVal); 1144 MV_U32 regVal, coal, usec; local 1149 regVal = MV_REG_READ (ETH_TX_FIFO_URGENT_THRESH_REG(pPortCtrl->portNo)); 1150 coal = ((regVal & ETH_TX_INTR_COAL_ALL_MASK) >> ETH_TX_INTR_COAL_OFFSET); 1157 regVal = MV_REG_READ(ETH_SDMA_CONFIG_REG(pPortCtrl->portNo)); 1158 coal = ((regVal 2899 MV_U32 regVal; local 2910 MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(port), regVal); local 2916 MV_U32 regVal; local 2935 MV_U32 regVal; local 2942 MV_REG_WRITE(ETH_PORT_SERIAL_CTRL_1_REG(port), regVal); local [all...] |
H A D | mvEthDebug.c | 565 MV_U32 regVal; local 572 regVal = MV_REG_READ((ETH_DA_FILTER_SPEC_MCAST_BASE(port) + tblIdx*4)); 575 if((regVal & (0x01 << (regIdx*8))) != 0) 578 tblIdx*4+regIdx, ((regVal >> (regIdx*8+1)) & 0x07)); 585 regVal = MV_REG_READ((ETH_DA_FILTER_OTH_MCAST_BASE(port) + tblIdx*4)); 588 if((regVal & (0x01 << (regIdx*8))) != 0) 591 tblIdx*4+regIdx, ((regVal >> (regIdx*8+1)) & 0x07));
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/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/ |
H A D | mvDramIf.c | 600 MV_U32 regVal; local 607 regVal = MV_REG_READ(SDRAM_ECC_CONTROL_REG); 608 regVal &= ~SECR_THRECC_MASK; 609 regVal |= ((SECR_THRECC(threshold) & SECR_THRECC_MASK)); 610 MV_REG_WRITE(SDRAM_ECC_CONTROL_REG, regVal);
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/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/ |
H A D | mvBoardEnvLib.h | 348 MV_STATUS mvBoarTwsiSatRSet(MV_U8 devNum, MV_U8 regNum, MV_U8 regVal);
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H A D | mvBoardEnvLib.c | 2252 * regVal - value 2262 MV_STATUS mvBoarTwsiSatRSet(MV_U8 devNum, MV_U8 regNum, MV_U8 regVal) argument 2277 twsiSlave.slaveAddr.type, regVal)); 2281 if( MV_OK != mvTwsiWrite (0, &twsiSlave, ®Val, 1) )
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