1/******************************************************************************* 2Copyright (C) Marvell International Ltd. and its affiliates 3 4This software file (the "File") is owned and distributed by Marvell 5International Ltd. and/or its affiliates ("Marvell") under the following 6alternative licensing terms. Once you have made an election to distribute the 7File under one of the following license alternatives, please (i) delete this 8introductory statement regarding license alternatives, (ii) delete the two 9license alternatives that you have not elected to use and (iii) preserve the 10Marvell copyright notice above. 11 12******************************************************************************** 13Marvell Commercial License Option 14 15If you received this File from Marvell and you have entered into a commercial 16license agreement (a "Commercial License") with Marvell, the File is licensed 17to you under the terms of the applicable Commercial License. 18 19******************************************************************************** 20Marvell GPL License Option 21 22If you received this File from Marvell, you may opt to use, redistribute and/or 23modify this File in accordance with the terms and conditions of the General 24Public License Version 2, June 1991 (the "GPL License"), a copy of which is 25available along with the File in the license.txt file or by writing to the Free 26Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 27on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 28 29THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 30WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 31DISCLAIMED. The GPL License provides additional details about this warranty 32disclaimer. 33******************************************************************************** 34Marvell BSD License Option 35 36If you received this File from Marvell, you may opt to use, redistribute and/or 37modify this File under the following licensing terms. 38Redistribution and use in source and binary forms, with or without modification, 39are permitted provided that the following conditions are met: 40 41 * Redistributions of source code must retain the above copyright notice, 42 this list of conditions and the following disclaimer. 43 44 * Redistributions in binary form must reproduce the above copyright 45 notice, this list of conditions and the following disclaimer in the 46 documentation and/or other materials provided with the distribution. 47 48 * Neither the name of Marvell nor the names of its contributors may be 49 used to endorse or promote products derived from this software without 50 specific prior written permission. 51 52THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 53ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 54WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 55DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 56ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 57(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 58LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 59ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 61SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 63*******************************************************************************/ 64#ifndef __INCmvBoardEnvLibh 65#define __INCmvBoardEnvLibh 66 67/* defines */ 68/* The below constant macros defines the board I2C EEPROM data offsets */ 69 70 71 72#include "ctrlEnv/mvCtrlEnvLib.h" 73#include "mvSysHwConfig.h" 74#include "boardEnv/mvBoardEnvSpec.h" 75 76 77/* DUART stuff for Tclk detection only */ 78#define DUART_BAUD_RATE 115200 79#define MAX_CLOCK_MARGINE 5000000 /* Maximum detected clock margine */ 80 81/* Voice devices assembly modes */ 82#define DAISY_CHAIN_MODE 1 83#define DUAL_CHIP_SELECT_MODE 0 84#define INTERRUPT_TO_MPP 1 85#define INTERRUPT_TO_TDM 0 86 87 88#define BOARD_ETH_PORT_NUM MV_ETH_MAX_PORTS 89#define BOARD_ETH_SWITCH_PORT_NUM 5 90 91#define MV_BOARD_MAX_USB_IF 1 92#define MV_BOARD_MAX_MPP 7 93#define MV_BOARD_NAME_LEN 0x20 94 95typedef struct _boardData 96{ 97 MV_U32 magic; 98 MV_U16 boardId; 99 MV_U8 boardVer; 100 MV_U8 boardRev; 101 MV_U32 reserved1; 102 MV_U32 reserved2; 103 104}BOARD_DATA; 105 106typedef enum _devBoardMppGroupClass 107{ 108 MV_BOARD_MPP_GROUP_1, 109 MV_BOARD_MPP_GROUP_2, 110 MV_BOARD_MAX_MPP_GROUP 111}MV_BOARD_MPP_GROUP_CLASS; 112 113typedef enum _devBoardMppTypeClass 114{ 115 MV_BOARD_AUTO, 116 MV_BOARD_TDM, 117 MV_BOARD_AUDIO, 118 MV_BOARD_RGMII, 119 MV_BOARD_GMII, 120 MV_BOARD_TS, 121 MV_BOARD_MII, 122 MV_BOARD_OTHER 123}MV_BOARD_MPP_TYPE_CLASS; 124 125typedef enum _devBoardModuleIdClass 126{ 127 MV_BOARD_MODULE_TDM_ID = 1, 128 MV_BOARD_MODULE_AUDIO_ID, 129 MV_BOARD_MODULE_RGMII_ID, 130 MV_BOARD_MODULE_GMII_ID, 131 MV_BOARD_MODULE_TS_ID, 132 MV_BOARD_MODULE_MII_ID, 133 MV_BOARD_MODULE_TDM_5CHAN_ID, 134 MV_BOARD_MODULE_OTHER_ID 135}MV_BOARD_MODULE_ID_CLASS; 136 137typedef struct _boardMppTypeInfo 138{ 139 MV_BOARD_MPP_TYPE_CLASS boardMppGroup1; 140 MV_BOARD_MPP_TYPE_CLASS boardMppGroup2; 141 142}MV_BOARD_MPP_TYPE_INFO; 143 144 145typedef enum _devBoardClass 146{ 147 BOARD_DEV_NOR_FLASH, 148 BOARD_DEV_NAND_FLASH, 149 BOARD_DEV_SEVEN_SEG, 150 BOARD_DEV_FPGA, 151 BOARD_DEV_SRAM, 152 BOARD_DEV_SPI_FLASH, 153 BOARD_DEV_OTHER, 154}MV_BOARD_DEV_CLASS; 155 156typedef enum _devTwsiBoardClass 157{ 158 BOARD_TWSI_RTC, 159 BOARD_DEV_TWSI_EXP, 160 BOARD_DEV_TWSI_SATR, 161 BOARD_TWSI_AUDIO_DEC, 162 BOARD_TWSI_OTHER 163}MV_BOARD_TWSI_CLASS; 164 165typedef enum _devGppBoardClass 166{ 167 BOARD_GPP_RTC, 168 BOARD_GPP_MV_SWITCH, 169 BOARD_GPP_USB_VBUS, 170 BOARD_GPP_USB_VBUS_EN, 171 BOARD_GPP_USB_OC, 172 BOARD_GPP_USB_HOST_DEVICE, 173 BOARD_GPP_REF_CLCK, 174 BOARD_GPP_VOIP_SLIC, 175 BOARD_GPP_LIFELINE, 176 BOARD_GPP_BUTTON, 177 BOARD_GPP_TS_BUTTON_C, 178 BOARD_GPP_TS_BUTTON_U, 179 BOARD_GPP_TS_BUTTON_D, 180 BOARD_GPP_TS_BUTTON_L, 181 BOARD_GPP_TS_BUTTON_R, 182 BOARD_GPP_POWER_BUTTON, 183 BOARD_GPP_RESTOR_BUTTON, 184 BOARD_GPP_WPS_BUTTON, 185 BOARD_GPP_HDD0_POWER, 186 BOARD_GPP_HDD1_POWER, 187 BOARD_GPP_FAN_POWER, 188 BOARD_GPP_RESET, 189 BOARD_GPP_POWER_ON_LED, 190 BOARD_GPP_HDD_POWER, 191 BOARD_GPP_SDIO_POWER, 192 BOARD_GPP_SDIO_DETECT, 193 BOARD_GPP_SDIO_WP, 194 BOARD_GPP_SWITCH_PHY_INT, 195 BOARD_GPP_TSU_DIRCTION, 196 BOARD_GPP_OTHER 197}MV_BOARD_GPP_CLASS; 198 199 200typedef struct _devCsInfo 201{ 202 MV_U8 deviceCS; 203 MV_U32 params; 204 MV_U32 devClass; /* MV_BOARD_DEV_CLASS */ 205 MV_U8 devWidth; 206 207}MV_DEV_CS_INFO; 208 209 210#define MV_BOARD_PHY_FORCE_10MB 0x0 211#define MV_BOARD_PHY_FORCE_100MB 0x1 212#define MV_BOARD_PHY_FORCE_1000MB 0x2 213#define MV_BOARD_PHY_SPEED_AUTO 0x3 214 215typedef struct _boardSwitchInfo 216{ 217 MV_32 linkStatusIrq; 218 MV_32 qdPort[BOARD_ETH_SWITCH_PORT_NUM]; 219 MV_32 qdCpuPort; 220 MV_32 smiScanMode; /* 1 for SMI_MANUAL_MODE, 0 otherwise */ 221 MV_32 switchOnPort; 222 223}MV_BOARD_SWITCH_INFO; 224 225typedef struct _boardLedInfo 226{ 227 MV_U8 activeLedsNumber; 228 MV_U8 ledsPolarity; /* '0' or '1' to turn on led */ 229 MV_U8* gppPinNum; /* Pointer to GPP values */ 230 231}MV_BOARD_LED_INFO; 232 233typedef struct _boardGppInfo 234{ 235 MV_BOARD_GPP_CLASS devClass; 236 MV_U8 gppPinNum; 237 238}MV_BOARD_GPP_INFO; 239 240 241typedef struct _boardTwsiInfo 242{ 243 MV_BOARD_TWSI_CLASS devClass; 244 MV_U8 twsiDevAddr; 245 MV_U8 twsiDevAddrType; 246 247}MV_BOARD_TWSI_INFO; 248 249 250typedef enum _boardMacSpeed 251{ 252 BOARD_MAC_SPEED_10M, 253 BOARD_MAC_SPEED_100M, 254 BOARD_MAC_SPEED_1000M, 255 BOARD_MAC_SPEED_AUTO, 256 257}MV_BOARD_MAC_SPEED; 258 259typedef struct _boardMacInfo 260{ 261 MV_BOARD_MAC_SPEED boardMacSpeed; 262 MV_U8 boardEthSmiAddr; 263 264}MV_BOARD_MAC_INFO; 265 266typedef struct _boardMppInfo 267{ 268 MV_U32 mppGroup[MV_BOARD_MAX_MPP]; 269 270}MV_BOARD_MPP_INFO; 271 272typedef struct _boardInfo 273{ 274 char boardName[MV_BOARD_NAME_LEN]; 275 MV_U8 numBoardMppTypeValue; 276 MV_BOARD_MPP_TYPE_INFO* pBoardMppTypeValue; 277 MV_U8 numBoardMppConfigValue; 278 MV_BOARD_MPP_INFO* pBoardMppConfigValue; 279 MV_U32 intsGppMaskLow; 280 MV_U32 intsGppMaskHigh; 281 MV_U8 numBoardDeviceIf; 282 MV_DEV_CS_INFO* pDevCsInfo; 283 MV_U8 numBoardTwsiDev; 284 MV_BOARD_TWSI_INFO* pBoardTwsiDev; 285 MV_U8 numBoardMacInfo; 286 MV_BOARD_MAC_INFO* pBoardMacInfo; 287 MV_U8 numBoardGppInfo; 288 MV_BOARD_GPP_INFO* pBoardGppInfo; 289 MV_U8 activeLedsNumber; 290 MV_U8* pLedGppPin; 291 MV_U8 ledsPolarity; /* '0' or '1' to turn on led */ 292 /* GPP values */ 293 MV_U32 gppOutEnValLow; 294 MV_U32 gppOutEnValHigh; 295 MV_U32 gppOutValLow; 296 MV_U32 gppOutValHigh; 297 MV_U32 gppPolarityValLow; 298 MV_U32 gppPolarityValHigh; 299 300 /* Switch Configuration */ 301 MV_BOARD_SWITCH_INFO* pSwitchInfo; 302}MV_BOARD_INFO; 303 304 305 306MV_VOID mvBoardEnvInit(MV_VOID); 307MV_U32 mvBoardIdGet(MV_VOID); 308MV_U16 mvBoardModelGet(MV_VOID); 309MV_U16 mvBoardRevGet(MV_VOID); 310MV_STATUS mvBoardNameGet(char *pNameBuff); 311MV_32 mvBoardPhyAddrGet(MV_U32 ethPortNum); 312MV_BOARD_MAC_SPEED mvBoardMacSpeedGet(MV_U32 ethPortNum); 313MV_32 mvBoardLinkStatusIrqGet(MV_U32 ethPortNum); 314MV_32 mvBoardSwitchPortGet(MV_U32 ethPortNum, MV_U8 boardPortNum); 315MV_32 mvBoardSwitchCpuPortGet(MV_U32 ethPortNum); 316MV_32 mvBoardIsSwitchConnected(MV_U32 ethPortNum); 317MV_32 mvBoardSmiScanModeGet(MV_U32 ethPortNum); 318MV_BOOL mvBoardIsPortInSgmii(MV_U32 ethPortNum); 319MV_BOOL mvBoardIsPortInGmii(MV_VOID); 320MV_U32 mvBoardTclkGet(MV_VOID); 321MV_U32 mvBoardSysClkGet(MV_VOID); 322MV_U32 mvBoardDebugLedNumGet(MV_U32 boardId); 323MV_VOID mvBoardDebugLed(MV_U32 hexNum); 324MV_32 mvBoardMppGet(MV_U32 mppGroupNum); 325 326MV_U8 mvBoardRtcTwsiAddrTypeGet(MV_VOID); 327MV_U8 mvBoardRtcTwsiAddrGet(MV_VOID); 328 329MV_U8 mvBoardA2DTwsiAddrTypeGet(MV_VOID); 330MV_U8 mvBoardA2DTwsiAddrGet(MV_VOID); 331 332MV_U8 mvBoardTwsiExpAddrGet(MV_U32 index); 333MV_U8 mvBoardTwsiSatRAddrTypeGet(MV_U32 index); 334MV_U8 mvBoardTwsiSatRAddrGet(MV_U32 index); 335MV_U8 mvBoardTwsiExpAddrTypeGet(MV_U32 index); 336MV_BOARD_MODULE_ID_CLASS mvBoarModuleTypeGet(MV_BOARD_MPP_GROUP_CLASS devClass); 337MV_BOARD_MPP_TYPE_CLASS mvBoardMppGroupTypeGet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass); 338MV_VOID mvBoardMppGroupTypeSet(MV_BOARD_MPP_GROUP_CLASS mppGroupClass, 339 MV_BOARD_MPP_TYPE_CLASS mppGroupType); 340MV_VOID mvBoardMppGroupIdUpdate(MV_VOID); 341MV_VOID mvBoardMppMuxSet(MV_VOID); 342MV_VOID mvBoardTdmMppSet(MV_32 chType); 343MV_VOID mvBoardVoiceConnModeGet(MV_32* connMode, MV_32* irqMode); 344 345MV_VOID mvBoardMppModuleTypePrint(MV_VOID); 346MV_VOID mvBoardReset(MV_VOID); 347MV_U8 mvBoarTwsiSatRGet(MV_U8 devNum, MV_U8 regNum); 348MV_STATUS mvBoarTwsiSatRSet(MV_U8 devNum, MV_U8 regNum, MV_U8 regVal); 349MV_BOOL mvBoardSpecInitGet(MV_U32* regOff, MV_U32* data); 350/* Board devices API managments */ 351MV_32 mvBoardGetDevicesNumber(MV_BOARD_DEV_CLASS devClass); 352MV_32 mvBoardGetDeviceBaseAddr(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); 353MV_32 mvBoardGetDeviceBusWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); 354MV_32 mvBoardGetDeviceWidth(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); 355MV_32 mvBoardGetDeviceWinSize(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); 356MV_U32 boardGetDevCSNum(MV_32 devNum, MV_BOARD_DEV_CLASS devClass); 357 358/* Gpio Pin Connections API */ 359MV_32 mvBoardUSBVbusGpioPinGet(int devId); 360MV_32 mvBoardUSBVbusEnGpioPinGet(int devId); 361MV_U32 mvBoardPexBridgeIntPinGet(MV_U32 devNum, MV_U32 intPin); 362 363MV_32 mvBoardResetGpioPinGet(MV_VOID); 364MV_32 mvBoardRTCGpioPinGet(MV_VOID); 365MV_32 mvBoardGpioIntMaskLowGet(MV_VOID); 366MV_32 mvBoardGpioIntMaskHighGet(MV_VOID); 367MV_32 mvBoardSlicGpioPinGet(MV_U32 slicNum); 368 369MV_32 mvBoardSDIOGpioPinGet(MV_VOID); 370MV_STATUS mvBoardSDioWPControl(MV_BOOL mode); 371MV_32 mvBoarGpioPinNumGet(MV_BOARD_GPP_CLASS class, MV_U32 index); 372 373MV_32 mvBoardNandWidthGet(void); 374MV_STATUS mvBoardFanPowerControl(MV_BOOL mode); 375MV_STATUS mvBoardHDDPowerControl(MV_BOOL mode); 376#endif /* __INCmvBoardEnvLibh */ 377