Searched refs:GBL_INT_MASK1 (Results 1 - 6 of 6) sorted by relevance

/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/src/hsl/isisc/
H A Disisc_misc.c994 HSL_REG_ENTRY_GET(rv, dev_id, GBL_INT_MASK1, 0, (a_uint8_t *) (&reg),
1007 HSL_REG_ENTRY_SET(rv, dev_id, GBL_INT_MASK1, 0, (a_uint8_t *) (&reg),
1019 HSL_REG_ENTRY_GET(rv, dev_id, GBL_INT_MASK1, 0, (a_uint8_t *) (&reg),
1155 HSL_REG_FIELD_GET(rv, dev_id, GBL_INT_MASK1, 0, LINK_CHG_INT_M,
1172 HSL_REG_FIELD_SET(rv, dev_id, GBL_INT_MASK1, 0, LINK_CHG_INT_M,
1192 HSL_REG_FIELD_GET(rv, dev_id, GBL_INT_MASK1, 0, LINK_CHG_INT_M,
/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/src/hsl/dess/
H A Ddess_misc.c1002 HSL_REG_ENTRY_GET(rv, dev_id, GBL_INT_MASK1, 0, (a_uint8_t *) (&reg),
1015 HSL_REG_ENTRY_SET(rv, dev_id, GBL_INT_MASK1, 0, (a_uint8_t *) (&reg),
1027 HSL_REG_ENTRY_GET(rv, dev_id, GBL_INT_MASK1, 0, (a_uint8_t *) (&reg),
1167 HSL_REG_FIELD_GET(rv, dev_id, GBL_INT_MASK1, 0, LINK_CHG_INT_M,
1184 HSL_REG_FIELD_SET(rv, dev_id, GBL_INT_MASK1, 0, LINK_CHG_INT_M,
1204 HSL_REG_FIELD_GET(rv, dev_id, GBL_INT_MASK1, 0, LINK_CHG_INT_M,
/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/src/hsl/isis/
H A Disis_misc.c890 HSL_REG_ENTRY_GET(rv, dev_id, GBL_INT_MASK1, 0, (a_uint8_t *) (&reg),
903 HSL_REG_ENTRY_SET(rv, dev_id, GBL_INT_MASK1, 0, (a_uint8_t *) (&reg),
915 HSL_REG_ENTRY_GET(rv, dev_id, GBL_INT_MASK1, 0, (a_uint8_t *) (&reg),
/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/include/hsl/dess/
H A Ddess_reg.h90 #define GBL_INT_MASK1 macro
/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/include/hsl/isis/
H A Disis_reg.h672 #define GBL_INT_MASK1 macro
/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/include/hsl/isisc/
H A Disisc_reg.h712 #define GBL_INT_MASK1 macro

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