Searched refs:CSR20 (Results 1 - 7 of 7) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/
H A Dariadne.h80 #define CSR20 0x1400 /* Current Transmit Buffer Address */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/tulip/
H A Dtulip.h127 CSR20 = 0x90, enumerator in enum:tulip_offsets
H A Dtulip_core.c1911 tmp = ioread32(ioaddr + CSR20);
1913 iowrite32(tmp, ioaddr + CSR20);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/wireless/rt2x00/
H A Drt2400pci.c517 rt2x00pci_register_read(rt2x00dev, CSR20, &reg);
525 rt2x00pci_register_write(rt2x00dev, CSR20, reg);
528 rt2x00pci_register_write(rt2x00dev, CSR20, reg);
530 rt2x00pci_register_read(rt2x00dev, CSR20, &reg);
532 rt2x00pci_register_write(rt2x00dev, CSR20, reg);
H A Drt2500pci.c565 rt2x00pci_register_read(rt2x00dev, CSR20, &reg);
573 rt2x00pci_register_write(rt2x00dev, CSR20, reg);
576 rt2x00pci_register_write(rt2x00dev, CSR20, reg);
578 rt2x00pci_register_read(rt2x00dev, CSR20, &reg);
580 rt2x00pci_register_write(rt2x00dev, CSR20, reg);
H A Drt2400pci.h263 * CSR20: Wakeup timer register.
268 #define CSR20 0x0050 macro
H A Drt2500pci.h340 * CSR20: Wakeup timer register.
345 #define CSR20 0x0050 macro

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