Searched refs:SPLL_REF_DIV_MASK (Results 1 - 17 of 17) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Drv740d.h33 #define SPLL_REF_DIV_MASK (0x3f << 4) macro
H A Drv730d.h34 #define SPLL_REF_DIV_MASK (0x3f << 4) macro
H A Drs780d.h32 # define SPLL_REF_DIV_MASK (7 << 2) macro
H A Dradeon_rv740_dpm.c152 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);
H A Dradeon_rs780_dpm.c995 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
1018 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1;
H A Dradeon_rv730_dpm.c83 spll_func_cntl &= ~(SPLL_HILEN_MASK | SPLL_LOLEN_MASK | SPLL_REF_DIV_MASK);
H A Drv770d.h97 #define SPLL_REF_DIV_MASK (0x3f << 4) macro
H A Dnid.h545 #define SPLL_REF_DIV_MASK (0x3f << 4) macro
H A Dcikd.h255 #define SPLL_REF_DIV_MASK (0x3f << 5) macro
H A Dsid.h92 #define SPLL_REF_DIV_MASK (0x3f << 4) macro
H A Dradeon_rv770_dpm.c530 spll_func_cntl &= ~(SPLL_HILEN_MASK | SPLL_LOLEN_MASK | SPLL_REF_DIV_MASK);
H A Devergreend.h81 #define SPLL_REF_DIV_MASK (0x3f << 4) macro
H A Dr600d.h1276 # define SPLL_REF_DIV_MASK (7 << 2) macro
H A Dradeon_ni_dpm.c2033 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);
H A Dradeon_si_dpm.c4815 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsid.h94 #define SPLL_REF_DIV_MASK (0x3f << 4) macro
H A Damdgpu_si_dpm.c5279 spll_func_cntl &= ~(SPLL_PDIV_A_MASK | SPLL_REF_DIV_MASK);

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