Searched refs:PACKET3_SET_BASE (Results 1 - 18 of 18) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsi_enums.h176 #define PACKET3_SET_BASE 0x11 macro
H A Dsoc15d.h83 #define PACKET3_SET_BASE 0x11 macro
H A Dnvd.h58 #define PACKET3_SET_BASE 0x11 macro
H A Dvid.h117 #define PACKET3_SET_BASE 0x11 macro
H A Dcikd.h235 #define PACKET3_SET_BASE 0x11 macro
H A Dsid.h1668 #define PACKET3_SET_BASE 0x11 macro
H A Damdgpu_gfx_v6_0.c2049 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
H A Damdgpu_gfx_v10_0.c2712 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
H A Damdgpu_gfx_v7_0.c2552 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
H A Damdgpu_gfx_v8_0.c4223 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
H A Damdgpu_gfx_v9_0.c3160 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Dnid.h1165 #define PACKET3_SET_BASE 0x11 macro
H A Dcikd.h1701 #define PACKET3_SET_BASE 0x11 macro
H A Dsid.h1605 #define PACKET3_SET_BASE 0x11 macro
H A Dradeon_si.c3588 radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
4469 case PACKET3_SET_BASE:
4547 case PACKET3_SET_BASE:
4665 case PACKET3_SET_BASE:
H A Dradeon_evergreen_cs.c2026 case PACKET3_SET_BASE:
3388 case PACKET3_SET_BASE:
H A Devergreend.h1551 #define PACKET3_SET_BASE 0x11 macro
H A Dradeon_cik.c4017 radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

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