Searched refs:MPLL_CNTL_MODE (Results 1 - 10 of 10) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Drv740d.h44 #define MPLL_CNTL_MODE 0x61c macro
H A Dradeon_rv740_dpm.c405 WREG32_P(MPLL_CNTL_MODE, SS_SSEN, ~SS_SSEN);
407 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_SSEN);
H A Dradeon_cypress_dpm.c236 WREG32_P(MPLL_CNTL_MODE, SS_SSEN, ~SS_SSEN);
240 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_SSEN);
241 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_DSMODE_EN);
H A Drv770d.h116 #define MPLL_CNTL_MODE 0x61c macro
H A Dradeon_rv770.c1164 tmp = RREG32(MPLL_CNTL_MODE);
1169 WREG32(MPLL_CNTL_MODE, tmp);
H A Dnid.h558 #define MPLL_CNTL_MODE 0x61c macro
H A Dsid.h612 #define MPLL_CNTL_MODE 0x2bb0 macro
H A Devergreend.h95 #define MPLL_CNTL_MODE 0x61c macro
H A Dradeon_si.c4016 tmp = RREG32(MPLL_CNTL_MODE);
4018 WREG32(MPLL_CNTL_MODE, tmp);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsid.h614 #define MPLL_CNTL_MODE 0xAEC macro

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