Searched refs:REG_WR (Results 1 - 2 of 2) sorted by relevance

/netbsd-6-1-5-RELEASE/sys/dev/pci/
H A Dif_bnx.c797 REG_WR(sc, BNX_MISC_ENABLE_CLR_BITS, 0x5ffffff);
896 REG_WR(sc, BNX_CTX_CTX_DATA, ctx_val);
897 REG_WR(sc, BNX_CTX_CTX_CTRL,
915 REG_WR(sc, BNX_CTX_DATA_ADR, offset);
916 REG_WR(sc, BNX_CTX_DATA, ctx_val);
956 REG_WR(sc, BNX_EMAC_MDIO_MODE, val);
965 REG_WR(sc, BNX_EMAC_MDIO_COMM, val);
996 REG_WR(sc, BNX_EMAC_MDIO_MODE, val);
1045 REG_WR(sc, BNX_EMAC_MDIO_MODE, val1);
1054 REG_WR(s
[all...]
H A Dif_bnxvar.h86 #define REG_WR(sc, reg, val) bus_space_write_4(sc->bnx_btag, sc->bnx_bhandle, reg, val) macro
92 #define BNX_SETBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) | (x)))
93 #define BNX_CLRBIT(sc, reg, x) REG_WR(sc, reg, (REG_RD(sc, reg) & ~(x)))

Completed in 107 milliseconds