Searched refs:RegPressure (Results 1 - 12 of 12) sorted by relevance
| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 59 RegPressure.resize(NumRC);
61 std::fill(RegPressure.begin(), RegPressure.end(), 0);
378 if ((RegPressure[RC->getID()] +
380 (RegPressure[RC->getID()] +
493 RegPressure[RC->getID()] += numberRCValSuccInSU(SU, RC->getID());
504 if (RegPressure[RC->getID()] >
506 RegPressure[RC->getID()] -= numberRCValPredInSU(SU, RC->getID());
507 else RegPressure[RC->getID()] = 0;
|
| H A D | ScheduleDAGRRList.cpp | 1607 /// RegPressure - Tracking current reg pressure per register class.
1609 std::vector<unsigned> RegPressure;
1629 RegPressure.resize(NumRC);
1631 std::fill(RegPressure.begin(), RegPressure.end(), 0);
1655 std::fill(RegPressure.begin(), RegPressure.end(), 0);
1905 unsigned RP = RegPressure[Id];
1932 if ((RegPressure[RCId] + Cost) >= RegLimit[RCId])
1951 if (RegPressure[RCI
[all...] |
| H A D | SelectionDAGISel.cpp | 223 if (TLI.getSchedulingPreference() == Sched::RegPressure)
|
| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/CodeGen/ |
| H A D | ResourcePriorityQueue.h | 51 /// RegPressure - Tracking current reg pressure per register class.
53 std::vector<unsigned> RegPressure; member in class:llvm::ResourcePriorityQueue
|
| H A D | MachineScheduler.h | 207 IntervalPressure RegPressure; member in class:llvm::ScheduleDAGMI
235 RPTracker(RegPressure), CurrentTop(), TopRPTracker(TopPressure),
278 const IntervalPressure &getRegPressure() const { return RegPressure; }
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/ |
| H A D | MachineLICM.cpp | 93 SmallVector<unsigned, 8> RegPressure; member in class:__anon10164::MachineLICM
141 RegPressure.clear();
342 RegPressure.resize(NumRC);
343 std::fill(RegPressure.begin(), RegPressure.end(), 0);
654 BackTrace.push_back(RegPressure);
797 std::fill(RegPressure.begin(), RegPressure.end(), 0);
825 RegPressure[RCId] += RCCost;
830 RegPressure[RCI
[all...] |
| /macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Target/ |
| H A D | TargetLowering.h | 63 RegPressure, // Scheduling for lowest register pressure. enumerator in enum:llvm::Sched::Preference
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 78 setSchedulingPreference(Sched::RegPressure);
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 79 setSchedulingPreference(Sched::RegPressure);
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 811 setSchedulingPreference(Sched::RegPressure);
1055 return Sched::RegPressure;
1066 return Sched::RegPressure;
1074 return Sched::RegPressure;
1079 return Sched::RegPressure;
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/ |
| H A D | SPUISelLowering.cpp | 479 setSchedulingPreference(Sched::RegPressure);
|
| /macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 182 setSchedulingPreference(Sched::RegPressure);
|
Completed in 415 milliseconds