Searched refs:Constraint (Results 1 - 25 of 33) sorted by relevance

12

/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/MC/MCParser/
H A DMCParsedAsmOperand.h26 /// Constraint - The constraint on this operand. Only valid when parsing
28 std::string Constraint; member in class:llvm::MCParsedAsmOperand
34 void setConstraint(StringRef C) { Constraint = C.str(); }
35 StringRef getConstraint() { return Constraint; }
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/NVPTX/
H A DNVPTXISelLowering.h98 ConstraintType getConstraintType(const std::string &Constraint) const;
100 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
121 virtual void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint,
H A DNVPTXISelLowering.cpp1113 std::string &Constraint,
1117 if (Constraint.length() > 1)
1120 TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
1243 NVPTXTargetLowering::getConstraintType(const std::string &Constraint) const {
1244 if (Constraint.size() == 1) {
1245 switch (Constraint[0]) {
1259 return TargetLowering::getConstraintType(Constraint);
1264 NVPTXTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, argument
1266 if (Constraint.size() == 1) {
1267 switch (Constraint[
1112 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue> &Ops, SelectionDAG &DAG) const argument
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Sparc/
H A DSparcISelLowering.h64 ConstraintType getConstraintType(const std::string &Constraint) const;
66 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
H A DSparcISelLowering.cpp1250 SparcTargetLowering::getConstraintType(const std::string &Constraint) const {
1251 if (Constraint.size() == 1) {
1252 switch (Constraint[0]) {
1258 return TargetLowering::getConstraintType(Constraint);
1262 SparcTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, argument
1264 if (Constraint.size() == 1) {
1265 switch (Constraint[0]) {
1271 return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/MC/
H A DMCInstrDesc.h150 MCOI::OperandConstraint Constraint) const {
152 (OpInfo[OpNum].Constraints & (1 << Constraint))) {
153 unsigned Pos = 16 + Constraint * 4;
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/CellSPU/
H A DSPUISelLowering.h139 getRegForInlineAsmConstraint(const std::string &Constraint,
142 void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint,
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MBlaze/
H A DMBlazeISelLowering.h159 ConstraintType getConstraintType(const std::string &Constraint) const;
167 getRegForInlineAsmConstraint(const std::string &Constraint,
H A DMBlazeISelLowering.cpp1074 getConstraintType(const std::string &Constraint) const
1082 if (Constraint.size() == 1) {
1083 switch (Constraint[0]) {
1091 return TargetLowering::getConstraintType(Constraint);
1129 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const { argument
1130 if (Constraint.size() == 1) {
1131 switch (Constraint[0]) {
1143 return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/MSP430/
H A DMSP430ISelLowering.h98 getConstraintType(const std::string &Constraint) const;
100 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
H A DMSP430ISelLowering.cpp207 MSP430TargetLowering::getConstraintType(const std::string &Constraint) const {
208 if (Constraint.size() == 1) {
209 switch (Constraint[0]) {
216 return TargetLowering::getConstraintType(Constraint);
221 getRegForInlineAsmConstraint(const std::string &Constraint, argument
223 if (Constraint.size() == 1) {
224 // GCC Constraint Letters
225 switch (Constraint[0]) {
235 return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Mips/
H A DMipsISelLowering.h231 ConstraintType getConstraintType(const std::string &Constraint) const;
239 getRegForInlineAsmConstraint(const std::string &Constraint,
247 std::string &Constraint,
H A DMipsISelLowering.cpp3513 getConstraintType(const std::string &Constraint) const
3526 if (Constraint.size() == 1) {
3527 switch (Constraint[0]) {
3538 return TargetLowering::getConstraintType(Constraint);
3592 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const argument
3594 if (Constraint.size() == 1) {
3595 switch (Constraint[0]) {
3634 return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
3640 std::string &Constraint,
3646 if (Constraint
3639 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue>&Ops, SelectionDAG &DAG) const argument
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/utils/TableGen/
H A DInstrInfoEmitter.cpp136 const CGIOperandList::ConstraintInfo &Constraint = local
138 if (Constraint.isNone())
140 else if (Constraint.isEarlyClobber())
143 assert(Constraint.isTied());
144 Res += "((" + utostr(Constraint.getTiedOperand()) +
H A DX86RecognizableInstr.cpp547 const CGIOperandList::ConstraintInfo &Constraint =
549 if (Constraint.isTied()) {
551 operandMapping[Constraint.getTiedOperand()] = operandIndex;
H A DAsmMatcherEmitter.cpp444 void formTwoOperandAlias(StringRef Constraint);
710 void MatchableInfo::formTwoOperandAlias(StringRef Constraint) { argument
713 parseTwoOperandConstraint(Constraint, TheDef->getLoc());
1445 std::string Constraint = local
1447 if (Constraint != "") {
1452 AliasII->formTwoOperandAlias(Constraint);
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/ARM/
H A DARMISelLowering.h335 ConstraintType getConstraintType(const std::string &Constraint) const;
343 getRegForInlineAsmConstraint(const std::string &Constraint,
351 std::string &Constraint,
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/PowerPC/
H A DPPCISelLowering.h318 ConstraintType getConstraintType(const std::string &Constraint) const;
326 getRegForInlineAsmConstraint(const std::string &Constraint,
337 std::string &Constraint,
H A DPPCISelLowering.cpp5755 PPCTargetLowering::getConstraintType(const std::string &Constraint) const {
5756 if (Constraint.size() == 1) {
5757 switch (Constraint[0]) {
5767 return TargetLowering::getConstraintType(Constraint);
5812 PPCTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint, argument
5814 if (Constraint.size() == 1) {
5815 // GCC RS6000 Constraint Letters
5816 switch (Constraint[0]) {
5835 return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
5842 std::string &Constraint,
5841 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue>&Ops, SelectionDAG &DAG) const argument
[all...]
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/Hexagon/
H A DHexagonISelLowering.h138 getRegForInlineAsmConstraint(const std::string &Constraint,
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/X86/
H A DX86ISelLowering.h559 ConstraintType getConstraintType(const std::string &Constraint) const;
573 std::string &Constraint,
582 getRegForInlineAsmConstraint(const std::string &Constraint,
/macosx-10.9.5/llvmCore-3425.0.33/lib/Target/XCore/
H A DXCoreISelLowering.h153 getRegForInlineAsmConstraint(const std::string &Constraint,
/macosx-10.9.5/llvmCore-3425.0.33/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp2709 TargetLowering::getConstraintType(const std::string &Constraint) const {
2710 if (Constraint.size() == 1) {
2711 switch (Constraint[0]) {
2739 if (Constraint.size() > 1 && Constraint[0] == '{' &&
2740 Constraint[Constraint.size()-1] == '}')
2759 std::string &Constraint,
2763 if (Constraint.length() > 1) return;
2765 char ConstraintLetter = Constraint[
2758 LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint, std::vector<SDValue> &Ops, SelectionDAG &DAG) const argument
2824 getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const argument
[all...]
/macosx-10.9.5/Heimdal-323.92.1/lib/asn1/
H A Dasn1parse.y229 %type <constraint_spec> Constraint
578 ConstrainedType : Type Constraint
580 /* if (Constraint.type == contentConstrant) {
581 assert(Constraint.u.constraint.type == octetstring|bitstring-w/o-NamedBitList); // remember to check type reference too
582 if (Constraint.u.constraint.type) {
583 assert((Constraint.u.constraint.type.length % 8) == 0);
586 if (Constraint.u.constraint.encoding) {
594 Constraint : '(' ConstraintSpec ')' label
/macosx-10.9.5/llvmCore-3425.0.33/include/llvm/Target/
H A DTargetLowering.h1485 C_Register, // Constraint represents specific register(s).
1486 C_RegisterClass, // Constraint represents any of register(s) in class.
1583 virtual ConstraintType getConstraintType(const std::string &Constraint) const;
1596 getRegForInlineAsmConstraint(const std::string &Constraint,
1607 virtual void LowerAsmOperandForConstraint(SDValue Op, std::string &Constraint,

Completed in 618 milliseconds

12