Searched refs:bit (Results 1 - 25 of 46) sorted by relevance

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/macosx-10.5.8/xnu-1228.15.4/osfmk/i386/
H A Dperfmon.h34 * Handy macros for bit/bitfield definition and manipulations:
36 #define bit(n) (1ULL << (n)) macro
37 #define field(n,m) ((bit((m)+1)-1) & ~(bit(n)-1))
46 #define PERFMON_AVAILABLE bit(7)
47 #define BTS_UNAVAILABLE bit(11)
184 #define PMC_EVTSEL_ALLCORES (bit(15)|bit(14))
185 #define PMC_EVTSEL_THISCORE (bit(14))
186 #define PMC_EVTSEL_ALLAGENTS (bit(1
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H A Dlock.h105 * General bit-lock routines.
108 #define bit_lock(bit,l) \
116 "r" (bit), "m" (*(volatile int *)(l)) : \
119 #define bit_unlock(bit,l) \
123 "r" (bit), "m" (*(volatile int *)(l)));
131 #define i_bit_set(bit,l) \
135 "r" (bit), "m" (*(volatile int *)(l)));
137 #define i_bit_clear(bit,l) \
141 "r" (bit), "m" (*(volatile int *)(l)));
145 int bit; local
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H A Dtsc.c83 #define bit(n) (1ULL << (n)) macro
84 #define bitmask(h,l) ((bit(h)|(bit(h)-1)) & ~(bit(l)-1))
164 if (msr_flex_ratio & bit(16)) {
190 N_by_2_bus_ratio = (prfsts & bit(46)) != 0;
215 * The tsc granularity is also called the "bus ratio". If the N/2 bit
/macosx-10.5.8/xnu-1228.15.4/osfmk/vm/
H A Dvm_external.c74 * The implementation uses bit arrays to record whether
76 * convenience, these bit arrays come in various sizes.
83 * For a 32-bit machine with 4KB pages, the largest size
238 int bit, byte; local
242 bit = atop_32(offset);
243 byte = bit >> 3;
244 if (map[byte] & (1 << (bit & 07))) {
257 int bit, byte; local
262 bit = atop_32(offset);
263 byte = bit >>
273 int bit, byte; local
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/macosx-10.5.8/xnu-1228.15.4/bsd/nfs/
H A Dnfs_gss.h141 #define win_getbit(bits, bit) ((bits[(bit) / 32] & (1 << (bit) % 32)) != 0)
142 #define win_setbit(bits, bit) do { bits[(bit) / 32] |= (1 << (bit) % 32); } while (0)
143 #define win_resetbit(bits, bit) do { bits[(bit) / 32] &= ~(1 << (bit) % 32); } while (0)
/macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/
H A Dbits.s39 # Set indicated bit in bit string.
40 # Note: being big-endian, bit 0 is 0x80000000.
45 rlwinm r9,r3,0,29,31 /* Get bit within byte */
46 li r6,0x80 /* Start with bit 0 */
48 srw r6,r6,r9 /* Get the right bit (fits right into the load cycle) */
49 or r5,r5,r6 /* Turn on the right bit */
56 # Clear indicated bit in bit string.
57 # Note: being big-endian, bit
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H A Dmachine_routines_asm.s37 * ml_set_physical() -- turn off DR and (if 64-bit) turn SF on
63 bt++ pf64Bitb,ml_set_physical_64 // skip if 64-bit (only they take the hint)
95 ori r0,r0,lo16(MASK(MSR_DR)+MASK(MSR_FP)) // always turn off DR and FP bit
97 bt++ pf64Bitb,ml_set_physical_64 // skip if 64-bit (only they take the hint)
105 rldimi r2,r0,63,MSR_SF_BIT // set SF bit (bit 0)
106 mtmsrd r2 // set 64-bit mode, turn off data relocation
124 bt++ pf64Bitb,ml_restore_64 // handle 64-bit cpus (only they take the hint)
125 mtmsr r11 // restore a 32-bit MSR
130 mtmsrd r11 // restore a 64-bit MS
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H A Dsavearea_asm.s54 * there are parallel paths for 32- and 64-bit machines.
72 bl saveSetup ; turn translation off, 64-bit on, load many regs
73 bf-- pf64Bitb,save_snapshot32 ; skip if 32-bit processor
75 ; Handle 64-bit processor.
110 ; Handle 32-bit processor.
158 bl saveSetup ; turn translation off, 64-bit on, load many regs
159 bf-- pf64Bitb,save_snapshot_restore32 ; skip if 32-bit processor
161 ; Handle 64-bit processor.
191 ; Handle 32-bit processor.
239 bl saveSetup ; turn translation off, 64-bit o
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H A Dbcopy.s52 ; Otherwise do a normal bcopy_phys. This routine is used because some 32-bit processors
66 ; Note that the address parameters are long longs. We will transform these to 64-bit
67 ; values. Note that on 32-bit architectures that this will ignore the high half of the
68 ; passed in value. This should be ok since we can not have any bigger than 32 bit addresses
71 ; Note also that this routine is used only on 32-bit machines. If you're contemplating use
72 ; on a 64-bit processor, use the physical memory window instead; please refer to copypv()
93 ; to bcopy_physvir() on 32-bit machines, and will result in a panic.
145 ; This routine is used on 32 and 64-bit machines.
147 ; Note that the address parameters are long longs. We will transform these to 64-bit
148 ; values. Note that on 32-bit architecture
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H A Ddb_asm.s56 ori r7,r7,lo16(MASK(MSR_DR)) ; Set the DR bit
H A Dhw_vm.s72 ; +--------+--------+--------+ for 65 bit VPN
170 bt++ pf64Bitb,hamSF1 ; skip if 64-bit (only they take the hint)
179 hamSF1x: bl EXT(mapSetUp) ; Turn off interrupts, translation, and possibly enter 64-bit
216 add r0,r0,r0 ; Get 0xFFFFFFFF00000000 for 64-bit or 0 for 32-bit
219 or r0,r30,r0 ; Fill high word of 64-bit with 1s so we will properly carry
288 rlwimi r10,r29,18,0,13 ; Shift EA[18:31] down to VSID (31-bit math works because of max hash table size)
299 bt++ pf64Bitb,ham64 ; This is 64-bit...
438 * a 64-bit quantity, it is a long long so it is in R4 and R5.
443 * Note that this is designed to be called from 32-bit mod
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H A Dvmachmon_asm.s74 .long EXT(vmm_map_page32) ; Maps a page from the main address space into the VM space - supports 32-bit
76 .long EXT(vmm_get_page_mapping32) ; Returns client va associated with VM va - supports 32-bit
78 .long EXT(vmm_unmap_page32) ; Unmaps a page from the VM space - supports 32-bit
82 .long EXT(vmm_get_page_dirty_flag32) ; Gets the change bit for a page and optionally clears it - supports 32-bit
94 .long EXT(vmm_protect_page32) ; Sets protection values for a page - supports 32-bit
96 .long EXT(vmm_map_execute32) ; Maps a page an launches VM - supports 32-bit
98 .long EXT(vmm_protect_execute32) ; Sets protection values for a page and launches VM - supports 32-bit
100 .long EXT(vmm_map_list32) ; Maps a list of pages - supports 32-bit
102 .long EXT(vmm_unmap_list32) ; Unmaps a list of pages - supports 32-bit
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H A Dskiplists.s33 * but it didn't scale well for 64-bit address spaces and multi-GB real memories.
55 * 64-bit link fields in every mapping. So we currently have two sizes of mappings:
70 ; cr7 bit set when mapSearchFull() finds a match on a high list:
90 * 64-bit mode is enabled (if on a 64-bit machine)
93 * r4 = high 32 bits of key to search for (0 if a 32-bit processor)
98 * Except for cr6 (which is global), we trash nonvolatile regs. Called both on 32- and 64-bit
106 la r8,pmapSkipLists+4(r3) ; point to lists in pmap, assuming 32-bit machine
114 lwzx r3,r8,r7 ; get 32-bit ptr to 1st mapping in highest list
115 bf-- pf64Bitb,mapSrch32c ; skip if 32-bit processo
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H A Dcache.s37 /* These routines run in 32 or 64-bit addressing, and handle
39 * on addresses, since compares are 32/64-bit-mode-specific.
70 rlwinm r3,r3,0,0,31 // truncate address in case this is a 64-bit machine
97 rlwinm r3,r3,0,0,31 // truncate address in case this is a 64-bit machine
124 rlwinm r3,r3,0,0,31 // truncate address in case this is a 64-bit machine
155 bt++ pf64Bitb,spp64 ; Skip if 64-bit (only they take the hint)
156 rlwinm r3,r3,12,0,19 ; Convert to physical address - 32-bit
159 spp64: sldi r3,r3,12 ; Convert to physical address - 64-bit
195 rlwinm r3,r3,0,0,31 // truncate address in case this is a 64-bit machine
215 mtcrf 0x02,r10 // move pf64Bit bit t
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/macosx-10.5.8/xnu-1228.15.4/bsd/dev/vn/
H A Dshadow.c38 * 1) a bit map to track which blocks have been written
92 u_char * block_bitmap; /* 1 bit per block; 1=written */
103 u_long bit; member in struct:__anon59
107 bit(int b) function
120 return ((u_char)(bit(b) - 1));
131 return ((u_char)((~bits_lower(start)) & (bits_lower(end) | bit(end))));
140 b.bit = where % NBBY;
164 if (start.bit) {
165 map[start.byte] |= byte_set_bits(start.bit, NBBY - 1);
166 start.bit
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/macosx-10.5.8/xnu-1228.15.4/libkern/gen/
H A DOSAtomicOperations.c152 static Boolean OSTestAndSetClear(UInt32 bit, Boolean wantSet, volatile UInt8 * startAddress) argument
158 startAddress += (bit / 8);
159 mask <<= (7 - (bit % 8));
172 Boolean OSTestAndSet(UInt32 bit, volatile UInt8 * startAddress) argument
174 return OSTestAndSetClear(bit, true, startAddress);
177 Boolean OSTestAndClear(UInt32 bit, volatile UInt8 * startAddress) argument
179 return OSTestAndSetClear(bit, false, startAddress);
/macosx-10.5.8/xnu-1228.15.4/libkern/libkern/
H A DOSAtomic.h47 @abstract 64-bit compare and swap operation.
54 @abstract 64-bit atomic add operation.
60 @abstract 64-bit increment.
69 @abstract 64-bit decrement.
93 @abstract 32-bit add operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
104 @abstract 16-bit add operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
115 @abstract 8-bit add operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
126 @abstract 32-bit increment operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
136 @abstract 16-bit increment operation, performed atomically with respect to all devices that participate in the coherency architecture of the platform.
146 @abstract 8-bit incremen
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/macosx-10.5.8/xnu-1228.15.4/osfmk/kdp/ml/ppc/
H A Dkdp_misc.s42 ; Source and dest are long longs. We do this with 64-bit on if
53 bl EXT(ml_set_physical_disabled) ; No DR and get 64-bit
/macosx-10.5.8/xnu-1228.15.4/bsd/dev/ppc/
H A Dxsumas.s30 #define cr1_gt 5 // bit 1 of cr1
44 * of the data, treated as an array of 16-bit integers. 1s-complement sums are done
46 * the adds can be done in parallel on 32-bit (or 64-bit) registers, as long as the
47 * final sum is folded down to 16 bits. On 32-bit machines we use "adde", which is
48 * perfect except that it serializes the adds on the carry bit. On 64-bit machines
49 * we avoid this serialization by adding 32-bit words into 64-bit sums, then folding
50 * all 64-bits into a 16-bit su
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/macosx-10.5.8/xnu-1228.15.4/bsd/sys/
H A Dsignalvar.h199 int clear_procsiglist(struct proc *p, int bit);
200 int clear_procsigmask(struct proc *p, int bit);
201 int set_procsigmask(struct proc *p, int bit);
/macosx-10.5.8/xnu-1228.15.4/bsd/kern/
H A Dkern_sig.c212 /* This assumes 32 bit __sa_handler is of type sig_t */
334 int bit, error=0; local
344 bit = sigmask(signum);
346 if ((ps->ps_sigonstack & bit) != 0)
348 if ((ps->ps_sigintr & bit) == 0)
350 if (ps->ps_siginfo & bit)
352 if (ps->ps_signodefer & bit)
354 if (ps->ps_64regset & bit)
389 clear_procsiglist(proc_t p, int bit) argument
401 uth->uu_siglist &= ~bit;
420 unblock_procsigmask(proc_t p, int bit) argument
450 block_procsigmask(proc_t p, int bit) argument
480 set_procsigmask(proc_t p, int bit) argument
514 int bit; local
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/macosx-10.5.8/xnu-1228.15.4/bsd/hfs/hfscommon/Misc/
H A DVolumeAllocation.c114 u_int32_t bit,
179 ; forceContiguous - Force contiguous flag - if bit 0 set (NE), allocation is contiguous
405 u_int32_t bit; local
415 bit = VCBTOHFS(vcb)->hfs_metazone_start;
416 if (bit == 1)
417 bit = 0;
423 * Count all the bits from bit to lastbit.
425 while (bit < lastbit) {
434 if (ReadBitmapBlock(vcb, bit, &currCache, &blockRef) != 0) {
443 bit
457 NextBitmapBlock( ExtendedVCB *vcb, u_int32_t bit) argument
493 ReadBitmapBlock( ExtendedVCB *vcb, u_int32_t bit, u_int32_t **buffer, u_int32_t *blockRef) argument
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/macosx-10.5.8/xnu-1228.15.4/bsd/netat/
H A Daurp_aurpd.c307 register int bit; local
309 bit = (int) p;
310 aurp_global.event |= bit;
313 ("aurp_wakeup: bit 0x%x, aurp_global.event now 0x%x\n",
314 bit, aurp_global.event));
/macosx-10.5.8/xnu-1228.15.4/iokit/Kernel/
H A DIOHibernateRestoreKernel.c188 uint32_t index, bit, bits; local
194 bit = (page - bitmap->first_page) & 31;
199 bits = (bits << bit);
204 count += 32 - bit;
/macosx-10.5.8/xnu-1228.15.4/osfmk/ipc/
H A Dipc_hash.c609 natural_t bit; local
613 for (bit = 1;; bit <<= 1) {
614 ipc_hash_global_mask |= bit;

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