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  • only in /macosx-10.5.8/xnu-1228.15.4/osfmk/ppc/

Lines Matching refs:bit

54  * there are parallel paths for 32- and 64-bit machines.
72 bl saveSetup ; turn translation off, 64-bit on, load many regs
73 bf-- pf64Bitb,save_snapshot32 ; skip if 32-bit processor
75 ; Handle 64-bit processor.
110 ; Handle 32-bit processor.
158 bl saveSetup ; turn translation off, 64-bit on, load many regs
159 bf-- pf64Bitb,save_snapshot_restore32 ; skip if 32-bit processor
161 ; Handle 64-bit processor.
191 ; Handle 32-bit processor.
239 bl saveSetup ; turn translation off, 64-bit on, load many regs
240 bf-- pf64Bitb,saveQueue32 ; skip if 32-bit processor
268 ; Handle 32-bit processor.
296 saveQueueExit: ; join here from 64-bit path
327 bl saveSetup ; turn translation off, 64-bit on, load many regs
329 btl++ pf64Bitb,saveGet64 ; get one on a 64-bit machine
337 bflr-- pf64Bitb ; if 32-bit processor, return
338 srdi r3,r4,32 ; unpack reg64_t to addr64_t on 64-bit machine
359 bl saveSetup ; turn translation off, 64-bit on, load many regs
360 bf-- pf64Bitb,svgt1 ; skip if 32-bit processor
371 svgt1: ; handle 32-bit processor
384 rlwinm r3,r3,0,0,31 ; 0 upper word if a 64-bit machine
430 * translation and interrupts already off, and in 64-bit mode.
446 * This is the internal routine to allocate a savearea on a 64-bit processor.
448 * would deadlock trying to reenter this routine. We pass back the 64-bit physical address.
452 * turned translation off, masked interrupts, turned on 64-bit mode, and set up:
456 * r3 = 64-bit physical address of the savearea
457 * r5 = 64-bit physical address of the page the savearea is in, with SAC
573 saveGetChokeJoin: ; join in the fun from 32-bit mode
589 * This is the internal routine to allocate a savearea on a 32-bit processor.
591 * would deadlock trying to reenter this routine. We pass back the 32-bit physical address.
599 * r3 = 32-bit physical address of the savearea
600 * r5 = 32-bit physical address of the page the savearea is in, with SAC
745 lwz r5,SACvrswap+0(r7) ; get 64-bit converter from V to R
746 lwz r6,SACvrswap+4(r7) ; both halves, though only bottom used on 32-bit machine
753 bl saveSetup ; turn translation off, 64-bit on, load many regs
757 bf-- pf64Bitb,svrt4 ; skip if a 32-bit processor
759 ; Handle 64-bit processor.
762 xor r3,r8,r6 ; get r3 <- 64-bit physical address of this savearea
767 ; Handle 32-bit processor.
770 xor r3,r8,r6 ; get r3 <- 32-bit physical address of this savearea
784 * Translation and interrupts are already off, and 64-bit mode is set if defined.
798 bf-- pf64Bitb,saveRet32 ; handle 32-bit machine
799 b saveRet64 ; handle 64-bit machine
807 * This is the internal routine to free a savearea, passed by 64-bit physical
828 * Here's a tricky bit, and important:
878 * This is the internal routine to free a savearea, passed by 32-bit physical
899 * Here's a tricky bit, and important:
989 bf-- pf64Bitb,saveTrim32 ; handle 32-bit processors
990 b saveTrim64 ; handle 64-bit processors
1011 * Handle "save_trim_free" on 32-bit processors. At this point, translation and interrupts
1068 lis r4,lo16(0x8000) ; Get the bit mask
1119 * Handle "save_trim_free" on 64-bit processors. At this point, translation and interrupts
1160 ; WARNING: as in the 32-bit path, this code is doing a divide by 640 (SAVsize).
1175 lis r4,lo16(0x8000) ; Get the bit mask
1220 ; is used both by the 32 and 64-bit paths.
1231 lwz r5,SACvrswap+4(r31) ; Get the vr conversion (only need low half if 64-bit)
1243 rlwinm r3,r3,0,0,31 ; if 64-bit, clear upper half of virtual address
1277 bf-- pf64Bitb,saveRecover32 ; handle 32-bit processor
1278 b saveRecover64 ; handle 64-bit processor
1297 * Handle "save_recover" on 32-bit processors. At this point, translation and interrupts
1339 lis r3,0x8000 ; Get the top bit on
1346 andc. r5,r5,r3 ; Clear out the "free" bit
1366 ; Join here from 64-bit path when we have recovered all the saveareas we need to.
1386 * Handle "save_recover" on 64-bit processors. At this point, translation and interrupts
1420 ; WARNING: as in the 32-bit path, we depend on (SAVsize==640)
1425 lis r3,0x8000 ; Get the top bit on
1432 andc. r5,r5,r3 ; Clear out the "free" bit
1530 * and in 32-bit mode. Note that the argument is passed as a long long in (r3,r4).
1541 bf-- pf64Bitb,save_cpv1 ; skip if 32-bit processor
1542 rldimi r5,r8,32,0 ; r5 <- 64-bit phys address of block
1544 lwz r6,SACvrswap+4(r5) ; Get the conversion to virtual (only need low half if 64-bit)
1547 rlwinm r3,r3,0,0,31 ; if 64-bit, zero upper half of virtual address
1557 * It turns off translation, disabled interrupts, turns on 64-bit mode,
1580 li r0,1 ; get a 1 in case its a 64-bit machine
1581 bf-- pf64Bitb,saveSetup1 ; skip if not a 64-bit machine
1582 rldimi r3,r0,63,MSR_SF_BIT ; turn SF (bit 0) on
1583 mtmsrd r3 ; turn translation and interrupts off, 64-bit mode on
1587 saveSetup1: ; here on 32-bit machines
1606 * and turns 64-bit mode back off.
1612 bt++ pf64Bitb,saveRestore64 ; handle a 64-bit processor
1617 saveRestore64: ; 64-bit processor