/macosx-10.10.1/tcl-105/tcl_ext/mk4tcl/metakit/tests/ |
H A D | tresize.cpp | 17 int Ins(int, int); 70 int CResizer::Ins(int pos_, int cnt_) { function in class:CResizer 114 int n = r1.Ins(0, 250); 127 n = r1.Ins(0, 500); 139 n = r1.Ins(0, 15); 154 n = r1.Ins(0, 2000); 156 n = r1.Ins(0, 3000); 158 n = r1.Ins(5000, 1000+big); 160 n = r1.Ins(100, 10); 162 n = r1.Ins(400 [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/CodeGen/ |
H A D | CallingConvLower.cpp | 67 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, argument 69 unsigned NumArgs = Ins.size(); 72 MVT ArgVT = Ins[i].VT; 73 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; 155 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, argument 157 for (unsigned i = 0, e = Ins.size(); i != e; ++i) { 158 MVT VT = Ins[i].VT; 159 ISD::ArgFlagsTy Flags = Ins[i].Flags;
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H A D | RegAllocGreedy.cpp | 707 unsigned Ins = 0; local 712 BC.Entry = SpillPlacement::MustSpill, ++Ins; local 714 BC.Entry = SpillPlacement::PrefSpill, ++Ins; local 716 ++Ins; 722 BC.Exit = SpillPlacement::MustSpill, ++Ins; local 724 BC.Exit = SpillPlacement::PrefSpill, ++Ins; local 726 ++Ins; 730 if (Ins) 731 StaticCost += Ins * SpillPlacer->getBlockFrequency(BC.Number); 918 unsigned Ins [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Hexagon/ |
H A D | HexagonCallingConvLower.cpp | 67 &Ins, 70 unsigned NumArgs = Ins.size(); 81 EVT ArgVT = Ins[i].VT; 82 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; 180 Hexagon_CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins, argument 184 for (unsigned i = 0, e = Ins.size(); i != e; ++i) { 185 EVT VT = Ins[i].VT; 66 AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, Hexagon_CCAssignFn Fn, unsigned SretValueInRegs) argument
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H A D | HexagonISelLowering.h | 79 const SmallVectorImpl<ISD::InputArg> &Ins, 94 const SmallVectorImpl<ISD::InputArg> &Ins, 104 const SmallVectorImpl<ISD::InputArg> &Ins,
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H A D | HexagonCallingConvLower.h | 80 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, 102 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.h | 130 const SmallVectorImpl<ISD::InputArg> &Ins, 137 const SmallVectorImpl<ISD::InputArg> &Ins, 144 const SmallVectorImpl<ISD::InputArg> &Ins, 151 const SmallVectorImpl<ISD::InputArg> &Ins,
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H A D | MSP430ISelLowering.cpp | 249 &Ins, 260 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals); 262 if (Ins.empty()) 275 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins; local 291 Outs, OutVals, Ins, dl, DAG, InVals); 306 &Ins, 319 CCInfo.AnalyzeFormalArguments(Ins, CC_MSP430); 446 const SmallVectorImpl<ISD::InputArg> &Ins, 558 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, d 245 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 302 LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 440 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 566 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument [all...] |
/macosx-10.10.1/tcl-105/tcl_ext/tcllib/tcllib/modules/pt/ |
H A D | pt_peg_to_tclparam.tcl | 271 #Op::Asm::Ins i_loc_push 272 #Op::Asm::Ins i_ast_push 274 Op::Asm::Ins si:value_symbol_start $symbol 276 Op::Asm::Ins si:reduce_symbol_end $symbol 278 #Op::Asm::Ins i_value_clear/reduce $symbol 279 #Op::Asm::Ins i_symbol_save $symbol 280 #Op::Asm::Ins i_error_nonterminal $symbol 281 #Op::Asm::Ins i_ast_pop_rewind 282 #Op::Asm::Ins i_loc_pop_discard 285 #Op::Asm::Ins [all...] |
/macosx-10.10.1/llvmCore-3425.0.34/lib/Transforms/IPO/ |
H A D | PartialInlining.cpp | 93 BasicBlock::iterator Ins = newReturnBlock->begin(); local 98 PHINode* retPhi = PHINode::Create(OldPhi->getType(), 2, "", Ins); 100 Ins = newReturnBlock->getFirstNonPHI();
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H A D | IPConstantPropagation.cpp | 250 Instruction *Ins = cast<Instruction>(*I); local 257 if (ExtractValueInst *EV = dyn_cast<ExtractValueInst>(Ins)) 270 Ins->replaceAllUsesWith(New); 271 Ins->eraseFromParent();
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 387 const SmallVectorImpl<ISD::InputArg> &Ins, 431 const SmallVectorImpl<ISD::InputArg> &Ins, 442 const SmallVectorImpl<ISD::InputArg> &Ins, 448 const SmallVectorImpl<ISD::InputArg> &Ins, 472 const SmallVectorImpl<ISD::InputArg> &Ins, 478 const SmallVectorImpl<ISD::InputArg> &Ins, 488 const SmallVectorImpl<ISD::InputArg> &Ins, 496 const SmallVectorImpl<ISD::InputArg> &Ins,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/XCore/ |
H A D | XCoreISelLowering.h | 114 const SmallVectorImpl<ISD::InputArg> &Ins, 122 const SmallVectorImpl<ISD::InputArg> &Ins, 127 const SmallVectorImpl<ISD::InputArg> &Ins, 172 const SmallVectorImpl<ISD::InputArg> &Ins,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/MBlaze/ |
H A D | MBlazeISelLowering.h | 115 const SmallVectorImpl<ISD::InputArg> &Ins, 130 const SmallVectorImpl<ISD::InputArg> &Ins,
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H A D | MBlazeISelLowering.cpp | 690 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins; local 831 if (!Ins.empty()) 837 Ins, dl, DAG, InVals); 844 bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, 852 CCInfo.AnalyzeCallResult(Ins, RetCC_MBlaze); 874 const SmallVectorImpl<ISD::InputArg> &Ins, 895 CCInfo.AnalyzeFormalArguments(Ins, CC_MBlaze); 1000 // the size of Ins and InVals. This only happens when on varg functions 843 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 873 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 448 SmallVector<ISD::InputArg, 32> &Ins = CLI.Ins; local 605 if (Ins.size() > 0) { 699 DAG.getConstant(isABI ? ((Ins.size()==0) ? 0 : 1) 750 if (Ins.size() > 0) { 753 for (unsigned i=0,e=Ins.size(); i!=e; ++i) { 754 unsigned sz = Ins[i].VT.getSizeInBits(); 755 if (Ins[i].VT.isInteger() && (sz < 8)) sz = 8; 757 LoadRetVTs.push_back(Ins[i].VT); 776 assert(Ins 913 LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument [all...] |
H A D | NVPTXISelLowering.h | 104 const SmallVectorImpl<ISD::InputArg> &Ins, DebugLoc dl,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Sparc/ |
H A D | SparcISelLowering.h | 74 const SmallVectorImpl<ISD::InputArg> &Ins,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/Mips/ |
H A D | MipsISelLowering.h | 82 Ins, enumerator in enum:llvm::MipsISD::NodeType 179 const SmallVectorImpl<ISD::InputArg> &Ins, 211 const SmallVectorImpl<ISD::InputArg> &Ins,
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/macosx-10.10.1/llvmCore-3425.0.34/utils/TableGen/ |
H A D | CodeGenRegisters.h | 76 std::pair<CompMap::iterator, bool> Ins = local 78 return (Ins.second || Ins.first->second == B) ? 0 : Ins.first->second;
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/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/CodeGen/ |
H A D | CallingConvLower.h | 197 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins, 224 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 457 const SmallVectorImpl<ISD::InputArg> &Ins, 464 const SmallVectorImpl<ISD::InputArg> &Ins, 496 const SmallVectorImpl<ISD::InputArg> &Ins,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/CellSPU/ |
H A D | SPUISelLowering.h | 156 const SmallVectorImpl<ISD::InputArg> &Ins,
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/macosx-10.10.1/llvmCore-3425.0.34/lib/Target/X86/ |
H A D | X86ISelLowering.h | 727 const SmallVectorImpl<ISD::InputArg> &Ins, 754 const SmallVectorImpl<ISD::InputArg> &Ins, 826 const SmallVectorImpl<ISD::InputArg> &Ins,
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/macosx-10.10.1/llvmCore-3425.0.34/include/llvm/Transforms/Utils/ |
H A D | SSAUpdaterImpl.h | 71 SmallVectorImpl<PhiT*> *Ins) : 72 Updater(U), AvailableVals(A), InsertedPHIs(Ins) { } 70 SSAUpdaterImpl(UpdaterT *U, AvailableValsTy *A, SmallVectorImpl<PhiT*> *Ins) argument
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