Searched refs:regDSCL3_DSCL_MEM_PWR_CTRL (Results 1 - 8 of 8) sorted by relevance

/linux-master/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h4523 #define regDSCL3_DSCL_MEM_PWR_CTRL 0x1158 macro
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H A Ddcn_3_2_1_offset.h4522 #define regDSCL3_DSCL_MEM_PWR_CTRL 0x1158 macro
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H A Ddcn_3_1_4_offset.h6812 #define regDSCL3_DSCL_MEM_PWR_CTRL 0x1158 macro
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H A Ddcn_3_1_6_offset.h6123 #define regDSCL3_DSCL_MEM_PWR_CTRL 0x1158 macro
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H A Ddcn_3_5_0_offset.h5813 #define regDSCL3_DSCL_MEM_PWR_CTRL 0x1158 macro
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H A Ddcn_3_5_1_offset.h5792 #define regDSCL3_DSCL_MEM_PWR_CTRL 0x1158 macro
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H A Ddcn_3_1_5_offset.h5662 #define regDSCL3_DSCL_MEM_PWR_CTRL 0x1158 macro
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H A Ddcn_3_1_2_offset.h5903 #define regDSCL3_DSCL_MEM_PWR_CTRL 0x1158 macro
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