Searched refs:refdiv (Results 1 - 24 of 24) sorted by relevance

/linux-master/drivers/clk/mmp/
H A Dclk-pll.c49 u32 fbdiv, refdiv, postdiv; local
60 refdiv = (val >> (pll->shift + 9)) & 0x1f;
63 refdiv = 1;
75 do_div(rate, refdiv);
79 if (refdiv == 3) {
81 } else if (refdiv == 4) {
84 pr_err("bad refdiv: %d (0x%08x)\n", refdiv, val);
89 do_div(rate, refdiv + 2);
/linux-master/drivers/clk/visconti/
H A Dpll.h30 .refdiv = _refdiv, \
41 unsigned int refdiv; member in struct:visconti_pll_rate_table
H A Dpll.c68 rate_table->refdiv = readl(pll->pll_base + PLL_REFDIV_REG) & PLL_REFDIV_MASK;
138 writel(rate_table->refdiv, pll->pll_base + PLL_REFDIV_REG);
/linux-master/arch/mips/ath25/
H A Dar2315.c207 unsigned int pllc_out, refdiv, fdiv, divby2; local
211 refdiv = ATH25_REG_MS(pllc_ctrl, AR2315_PLLC_REF_DIV);
212 refdiv = clockctl1_predivide_table[refdiv];
215 pllc_out = (40000000 / refdiv) * (2 * divby2) * fdiv;
/linux-master/drivers/clk/berlin/
H A Dberlin2-avpll.c159 u32 reg, refdiv, fbdiv; local
162 /* AVPLL VCO frequency: Fvco = (Fref / refdiv) * fbdiv */
164 refdiv = (reg & VCO_REFDIV_MASK) >> VCO_REFDIV_SHIFT;
165 refdiv = vco_refdiv[refdiv];
168 do_div(freq, refdiv);
/linux-master/drivers/clk/rockchip/
H A Dclk-pll.c151 rate->refdiv = ((pllcon >> RK3036_PLLCON1_REFDIV_SHIFT)
173 do_div(rate64, cur.refdiv);
179 do_div(frac_rate64, cur.refdiv);
200 pr_debug("%s: rate settings for %lu fbdiv: %d, postdiv1: %d, refdiv: %d, postdiv2: %d, dsmpd: %d, frac: %d\n",
201 __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv,
220 writel_relaxed(HIWORD_UPDATE(rate->refdiv, RK3036_PLLCON1_REFDIV_MASK,
317 pr_debug("old - fbdiv: %d, postdiv1: %d, refdiv: %d, postdiv2: %d, dsmpd: %d, frac: %d\n",
318 cur.fbdiv, cur.postdiv1, cur.refdiv, cur.postdiv2,
320 pr_debug("new - fbdiv: %d, postdiv1: %d, refdiv: %d, postdiv2: %d, dsmpd: %d, frac: %d\n",
321 rate->fbdiv, rate->postdiv1, rate->refdiv, rat
[all...]
H A Dclk.h298 .refdiv = _refdiv, \
361 unsigned int refdiv; member in struct:rockchip_pll_rate_table::__anon365::__anon367
/linux-master/drivers/clk/pistachio/
H A Dclk-pll.c206 if (!params || !params->refdiv)
212 vco = div64_u64(vco, params->refdiv << 24);
218 val = div64_u64(params->fref, params->refdiv);
229 val |= (params->refdiv << PLL_CTRL1_REFDIV_SHIFT) |
363 if (!params || !params->refdiv)
366 vco = div_u64(params->fref * params->fbdiv, params->refdiv);
371 val = div_u64(params->fref, params->refdiv);
397 val |= (params->refdiv << PLL_CTRL1_REFDIV_SHIFT) |
H A Dclk.h97 unsigned long long refdiv; member in struct:pistachio_pll_rate_table
/linux-master/drivers/media/dvb-frontends/
H A Dcx24113.c85 u8 refdiv; member in struct:cx24113_state
281 static u8 cx24113_set_ref_div(struct cx24113_state *state, u8 refdiv) argument
284 refdiv = 2;
285 return state->refdiv = refdiv;
396 cx24113_set_nfr(state, n, f, state->refdiv);
/linux-master/drivers/clk/socfpga/
H A Dclk-pll-s10.c87 unsigned long refdiv; local
93 refdiv = (reg & SOCFPGA_PLL_REFDIV_MASK) >> SOCFPGA_PLL_REFDIV_SHIFT;
96 do_div(vco_freq, refdiv);
/linux-master/drivers/net/wireless/ath/ath10k/
H A Dhw.c489 .refdiv = 0,
497 .refdiv = 0,
505 .refdiv = 0,
513 .refdiv = 0,
521 .refdiv = 0,
529 .refdiv = 0,
537 .refdiv = 0,
545 .refdiv = 0,
822 reg_val |= (SM(hw_clk->refdiv, WLAN_PLL_CONTROL_REFDIV) |
H A Dhw.h502 u32 refdiv; member in struct:ath10k_hw_clk_params
/linux-master/sound/soc/codecs/
H A Darizona.c2099 int refdiv; member in struct:arizona_fll_cfg
2156 int refdiv, div; local
2158 /* Fref must be <=13.5MHz, find initial refdiv */
2160 cfg->refdiv = 0;
2164 cfg->refdiv++;
2195 /* Adjust FRATIO/refdiv to avoid integer mode if possible */
2196 refdiv = cfg->refdiv;
2198 arizona_fll_dbg(fll, "pseudo: initial ratio=%u fref=%u refdiv=%u\n",
2199 init_ratio, Fref, refdiv);
[all...]
H A Dmadera.c3509 int refdiv, div; local
3511 /* fref must be <=13.5MHz, find initial refdiv */
3513 cfg->refdiv = 0;
3517 cfg->refdiv++;
3555 * For CS47L35 rev A0, CS47L85 and WM1840 adjust FRATIO/refdiv to avoid
3558 refdiv = cfg->refdiv;
3567 cfg->refdiv = refdiv;
3583 cfg->refdiv
4423 int refdiv, fref, fout, lockdet_thr, fbdiv, hp, fast_clk, fllgcd; local
[all...]
H A Dmadera.h152 int refdiv; member in struct:madera_fll_cfg
/linux-master/drivers/clk/
H A Dclk-axm5516.c52 unsigned long rate, fbdiv, refdiv, postdiv; local
58 refdiv = ((control >> 16) & 0x1f) + 1;
59 rate = (parent_rate / (refdiv * postdiv)) * fbdiv;
H A Dclk-bm1880.c477 u32 fbdiv, refdiv; local
481 refdiv = regval & 0x1f;
486 denominator = refdiv * postdiv1 * postdiv2;
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_mode.h451 uint8_t refdiv; member in struct:amdgpu_atom_ss
H A Datombios_crtc.c339 if (amdgpu_crtc->ss.refdiv) {
341 amdgpu_crtc->pll_reference_div = amdgpu_crtc->ss.refdiv;
/linux-master/drivers/net/wireless/ath/ath9k/
H A Dhw.c821 /* program refdiv, nint, frac to RTC register */
833 u32 regval, pll2_divint, pll2_divfrac, refdiv; local
846 refdiv = 1;
850 refdiv = 3;
856 refdiv = 5;
862 refdiv = 1;
874 REG_WRITE(ah, AR_PHY_PLL_CONTROL, (refdiv << 27) |
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_mode.h306 uint8_t refdiv; member in struct:radeon_atom_ss
H A Datombios_crtc.c622 if (radeon_crtc->ss.refdiv) {
624 radeon_crtc->pll_reference_div = radeon_crtc->ss.refdiv;
H A Dradeon_atombios.c1407 ss->refdiv = ss_assign->ucRecommendedRef_Div;

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