Searched refs:ipg (Results 1 - 24 of 24) sorted by relevance

/linux-master/sound/soc/fsl/
H A Dfsl_rpmsg.h22 * @ipg: ipg clock for cpu dai (SAI)
35 struct clk *ipg; member in struct:fsl_rpmsg
H A Dfsl_mqs.c62 struct clk *ipg; member in struct:fsl_mqs
231 mqs_priv->ipg = devm_clk_get(&pdev->dev, "core");
232 if (IS_ERR(mqs_priv->ipg)) {
234 PTR_ERR(mqs_priv->ipg));
235 return PTR_ERR(mqs_priv->ipg);
268 ret = clk_prepare_enable(mqs_priv->ipg);
270 dev_err(dev, "failed to enable ipg clock\n");
277 clk_disable_unprepare(mqs_priv->ipg);
292 clk_disable_unprepare(mqs_priv->ipg);
H A Dfsl_rpmsg.c235 rpmsg->ipg = devm_clk_get_optional(&pdev->dev, "ipg");
236 if (IS_ERR(rpmsg->ipg))
237 return PTR_ERR(rpmsg->ipg);
286 ret = clk_prepare_enable(rpmsg->ipg);
288 dev_err(dev, "failed to enable ipg clock: %d\n", ret);
301 clk_disable_unprepare(rpmsg->ipg);
311 clk_disable_unprepare(rpmsg->ipg);
/linux-master/drivers/net/ethernet/mscc/
H A Docelot_police.h31 u8 ipg; /* Size of IPG when MSCC_QOS_RATE_MODE_LINE is chosen */ member in struct:qos_policer_conf
H A Docelot_police.c30 u8 ipg = 20; local
41 ipg = min_t(u8, GENMASK(4, 0), conf->ipg);
132 value = (ANA_POL_MODE_CFG_IPG_SIZE(ipg) |
/linux-master/drivers/clocksource/
H A Dtimer-imx-tpm.c177 struct clk *ipg; local
180 ipg = of_clk_get_by_name(np, "ipg");
181 if (IS_ERR(ipg)) {
182 pr_err("tpm: failed to get ipg clk\n");
186 ret = clk_prepare_enable(ipg);
188 pr_err("tpm: ipg clock enable failed (%d)\n", ret);
189 clk_put(ipg);
/linux-master/drivers/net/ethernet/ti/icssg/
H A Dicssg_mii_cfg.c15 void icssg_mii_update_ipg(struct regmap *mii_rt, int mii, u32 ipg) argument
20 regmap_write(mii_rt, PRUSS_MII_RT_TX_IPG0, ipg);
23 regmap_write(mii_rt, PRUSS_MII_RT_TX_IPG1, ipg);
H A Dicssg_config.c207 u32 ipg; local
211 ipg = emac->is_sr1 ? MII_RT_TX_IPG_1G_SR1 : MII_RT_TX_IPG_1G;
214 ipg = emac->is_sr1 ? MII_RT_TX_IPG_100M_SR1 : MII_RT_TX_IPG_100M;
221 ipg = MII_RT_TX_IPG_100M;
229 icssg_mii_update_ipg(prueth->mii_rt, slice, ipg);
H A Dicssg_mii_rt.h143 void icssg_mii_update_ipg(struct regmap *mii_rt, int mii, u32 ipg);
/linux-master/drivers/net/wireless/mediatek/mt76/mt7915/
H A Dtestmode.c190 mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode) argument
205 if (ipg < sig_ext + slot_time + sifs)
206 ipg = 0;
208 if (!ipg)
211 ipg -= sig_ext;
213 if (ipg <= (TM_MAX_SIFS + slot_time)) {
214 sifs = ipg - slot_time;
216 u32 val = (ipg + slot_time) / slot_time;
224 ipg -= ((1 << cw) - 1) * slot_time;
226 aifsn = ipg / slot_tim
442 u32 ipg = td->tx_ipg; local
[all...]
/linux-master/drivers/clk/imx/
H A Dclk-imx31.c34 static const char *per_sel[] = { "per_div", "ipg", };
39 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator in enum:mx31_clks
65 clk[ipg] = imx_clk_divider("ipg", "ahb", base + MXC_CCM_PDR0, 6, 2);
80 clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MXC_CCM_CGR0, 10);
81 clk[ata_gate] = imx_clk_gate2("ata_gate", "ipg", base + MXC_CCM_CGR0, 12);
83 clk[cspi3_gate] = imx_clk_gate2("cspi3_gate", "ipg", base + MXC_CCM_CGR0, 16);
84 clk[rng_gate] = imx_clk_gate2("rng_gate", "ipg", base + MXC_CCM_CGR0, 18);
95 clk[rtc_gate] = imx_clk_gate2("rtc_gate", "ipg", base + MXC_CCM_CGR1, 8);
96 clk[wdog_gate] = imx_clk_gate2("wdog_gate", "ipg", bas
[all...]
H A Dclk-imx25.c49 "ipg", "dummy", "dummy", "dummy",
54 dummy, osc, mpll, upll, mpll_cpu_3_4, cpu_sel, cpu, ahb, usb_div, ipg, enumerator in enum:mx25_clks
89 clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);
156 clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2);
157 clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3);
158 clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4);
159 clk[cspi1_ipg] = imx_clk_gate("cspi1_ipg", "ipg", ccm(CCM_CGCR1), 5);
160 clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6);
161 clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", cc
[all...]
H A Dclk-imx35.c65 /* 9 */ ipg, arm_per_div, ahb_per_div, ipg_per, uart_sel, uart_div, enumerator in enum:mx35_clks
132 clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);
164 clk[asrc_gate] = imx_clk_gate2("asrc_gate", "ipg", base + MX35_CCM_CGR0, 0);
165 clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", base + MX35_CCM_CGR0, 2);
166 clk[audmux_gate] = imx_clk_gate2("audmux_gate", "ipg", base + MX35_CCM_CGR0, 4);
167 clk[can1_gate] = imx_clk_gate2("can1_gate", "ipg", base + MX35_CCM_CGR0, 6);
168 clk[can2_gate] = imx_clk_gate2("can2_gate", "ipg", base + MX35_CCM_CGR0, 8);
169 clk[cspi1_gate] = imx_clk_gate2("cspi1_gate", "ipg", base + MX35_CCM_CGR0, 10);
170 clk[cspi2_gate] = imx_clk_gate2("cspi2_gate", "ipg", bas
[all...]
/linux-master/drivers/net/ethernet/chelsio/cxgb4/
H A Dcudbg_entity.h47 u32 ipg[NTX_SCHED]; member in struct:cudbg_hw_sched
H A Dcxgb4.h2069 unsigned int *kbps, unsigned int *ipg, bool sleep_ok);
H A Dt4_hw.c10278 * @ipg: the interpacket delay in tenths of nanoseconds
10284 unsigned int *kbps, unsigned int *ipg, bool sleep_ok)
10302 if (ipg) {
10308 *ipg = (10000 * v) / core_ticks_per_usec(adap);
10283 t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps, unsigned int *ipg, bool sleep_ok) argument
H A Dcudbg_lib.c1652 &hw_sched_buff->ipg[i], true);
/linux-master/drivers/net/ethernet/chelsio/cxgb3/
H A Dxgmac.c348 int ipg; local
413 ipg = (adap->params.rev == T3_REV_C) ? 0 : 1;
416 V_TXFIFOTHRESH(thres) | V_TXIPG(ipg));
/linux-master/drivers/net/ethernet/amd/
H A Damd8111e.c1174 /* Delete ipg timer */
1212 /* Start ipg timer */
1633 /* Restart ipg timer */
1652 ipg_data->ipg = DEFAULT_IPG;
1661 ipg_data->ipg = MIN_IPG - IPG_STEP;
1683 ipg_data->ipg = ipg_data->current_ipg;
1691 tmp_ipg = ipg_data->ipg;
1852 /* Initialize software ipg timer */
1857 lp->ipg_data.ipg = DEFAULT_IPG;
H A Damd8111e.h592 /* ipg parameters */
725 unsigned int ipg; member in struct:ipg_info
/linux-master/drivers/net/ethernet/agere/
H A Det131x.h899 * 30-24: non B2B ipg 1
901 * 22-16: non B2B ipg 2
903 * 7-0: B2B ipg
1049 u32 ipg; /* 0x5008 */ member in struct:mac_regs
H A Det131x.c811 u32 ipg; local
822 ipg = 0x38005860; /* IPG1 0x38 IPG2 0x58 B2B 0x60 */
823 ipg |= 0x50 << 8; /* ifg enforce 0x50 */
824 writel(ipg, &macregs->ipg);
/linux-master/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt_hsi.h4663 u8 ipg; member in struct:hwrm_port_mac_cfg_input
4712 u8 ipg; member in struct:hwrm_port_mac_cfg_output
/linux-master/include/linux/mlx5/
H A Dmlx5_ifc.h10060 u8 ipg[0x4]; member in struct:mlx5_ifc_pipg_reg_bits

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