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9f771493 |
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20-Oct-2023 |
Su Hui <suhui@nfschina.com> |
net: chelsio: cxgb4: add an error code check in t4_load_phy_fw t4_set_params_timeout() can return -EINVAL if failed, add check for this. Signed-off-by: Su Hui <suhui@nfschina.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1c7ab9cd |
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05-May-2022 |
Kees Cook <keescook@chromium.org> |
net: chelsio: cxgb4: Avoid potential negative array offset Using min_t(int, ...) as a potential array index implies to the compiler that negative offsets should be allowed. This is not the case, though. Replace "int" with "unsigned int". Fixes the following warning exposed under future CONFIG_FORTIFY_SOURCE improvements: In file included from include/linux/string.h:253, from include/linux/bitmap.h:11, from include/linux/cpumask.h:12, from include/linux/smp.h:13, from include/linux/lockdep.h:14, from include/linux/rcupdate.h:29, from include/linux/rculist.h:11, from include/linux/pid.h:5, from include/linux/sched.h:14, from include/linux/delay.h:23, from drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:35: drivers/net/ethernet/chelsio/cxgb4/t4_hw.c: In function 't4_get_raw_vpd_params': include/linux/fortify-string.h:46:33: warning: '__builtin_memcpy' pointer overflow between offset 29 and size [2147483648, 4294967295] [-Warray-bounds] 46 | #define __underlying_memcpy __builtin_memcpy | ^ include/linux/fortify-string.h:388:9: note: in expansion of macro '__underlying_memcpy' 388 | __underlying_##op(p, q, __fortify_size); \ | ^~~~~~~~~~~~~ include/linux/fortify-string.h:433:26: note: in expansion of macro '__fortify_memcpy_chk' 433 | #define memcpy(p, q, s) __fortify_memcpy_chk(p, q, s, \ | ^~~~~~~~~~~~~~~~~~~~ drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:2796:9: note: in expansion of macro 'memcpy' 2796 | memcpy(p->id, vpd + id, min_t(int, id_len, ID_LEN)); | ^~~~~~ include/linux/fortify-string.h:46:33: warning: '__builtin_memcpy' pointer overflow between offset 0 and size [2147483648, 4294967295] [-Warray-bounds] 46 | #define __underlying_memcpy __builtin_memcpy | ^ include/linux/fortify-string.h:388:9: note: in expansion of macro '__underlying_memcpy' 388 | __underlying_##op(p, q, __fortify_size); \ | ^~~~~~~~~~~~~ include/linux/fortify-string.h:433:26: note: in expansion of macro '__fortify_memcpy_chk' 433 | #define memcpy(p, q, s) __fortify_memcpy_chk(p, q, s, \ | ^~~~~~~~~~~~~~~~~~~~ drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:2798:9: note: in expansion of macro 'memcpy' 2798 | memcpy(p->sn, vpd + sn, min_t(int, sn_len, SERNUM_LEN)); | ^~~~~~ Additionally remove needless cast from u8[] to char * in last strim() call. Reported-by: kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/lkml/202205031926.FVP7epJM-lkp@intel.com Fixes: fc9279298e3a ("cxgb4: Search VPD with pci_vpd_find_ro_info_keyword()") Fixes: 24c521f81c30 ("cxgb4: Use pci_vpd_find_id_string() to find VPD ID string") Cc: Raju Rangoju <rajur@chelsio.com> Cc: Eric Dumazet <edumazet@google.com> Cc: Paolo Abeni <pabeni@redhat.com> Signed-off-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20220505233101.1224230-1-keescook@chromium.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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47d71f45 |
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01-Oct-2021 |
Jakub Kicinski <kuba@kernel.org> |
ethernet: chelsio: use eth_hw_addr_set() Convert chelsio drivers from memcpy() and ether_addr_copy() to eth_hw_addr_set(). They lack includes. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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24c521f8 |
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26-Aug-2021 |
Heiner Kallweit <hkallweit1@gmail.com> |
cxgb4: Use pci_vpd_find_id_string() to find VPD ID string Use pci_vpd_find_id_string() to find the VPD ID string. This simplifies the code and avoids the need for pci_vpd_lrdt_size(). Link: https://lore.kernel.org/r/19ea2e9b-6e94-288a-6612-88db01b1b417@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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fc927929 |
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22-Aug-2021 |
Heiner Kallweit <hkallweit1@gmail.com> |
cxgb4: Search VPD with pci_vpd_find_ro_info_keyword() Use pci_vpd_find_ro_info_keyword() to search for keywords in VPD to simplify the code. Link: https://lore.kernel.org/r/db576a3e-e877-b37b-98ed-cfc03d225ab3@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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f9f3caa8 |
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22-Aug-2021 |
Heiner Kallweit <hkallweit1@gmail.com> |
cxgb4: Remove unused vpd_param member ec Member ec isn't used, so remove it. Link: https://lore.kernel.org/r/30648e95-bfb9-9af3-0c8f-dd3e34df8b6b@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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52f0a1e0 |
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22-Aug-2021 |
Heiner Kallweit <hkallweit1@gmail.com> |
cxgb4: Validate VPD checksum with pci_vpd_check_csum() Validate the VPD checksum with pci_vpd_check_csum() to simplify the code. Link: https://lore.kernel.org/r/70404ece-0036-c0ce-f824-f5637e54115e@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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bc4f128d |
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24-Aug-2021 |
Nathan Chancellor <nathan@kernel.org> |
cxgb4: Properly revert VPD changes Clang warns: drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:2785:2: error: variable 'kw_offset' is uninitialized when used here [-Werror,-Wuninitialized] FIND_VPD_KW(i, "RV"); ^~~~~~~~~~~~~~~~~~~~ drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:2776:39: note: expanded from macro 'FIND_VPD_KW' var = pci_vpd_find_info_keyword(vpd, kw_offset, vpdr_len, name); \ ^~~~~~~~~ drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:2748:34: note: initialize the variable 'kw_offset' to silence this warning unsigned int vpdr_len, kw_offset, id_len; ^ = 0 drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:2785:2: error: variable 'vpdr_len' is uninitialized when used here [-Werror,-Wuninitialized] FIND_VPD_KW(i, "RV"); ^~~~~~~~~~~~~~~~~~~~ drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:2776:50: note: expanded from macro 'FIND_VPD_KW' var = pci_vpd_find_info_keyword(vpd, kw_offset, vpdr_len, name); \ ^~~~~~~~ drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:2748:23: note: initialize the variable 'vpdr_len' to silence this warning unsigned int vpdr_len, kw_offset, id_len; ^ = 0 2 errors generated. The series "PCI/VPD: Convert more users to the new VPD API functions" was applied to net-next when it should have been applied to the PCI tree because of build errors. However, commit 82e34c8a9bdf ("Revert "Revert "cxgb4: Search VPD with pci_vpd_find_ro_info_keyword()""") reapplied a change, resulting in the warning above. Properly revert commit 8d63ee602da3 ("cxgb4: Search VPD with pci_vpd_find_ro_info_keyword()") to fix the warning and restore proper functionality. This also reverts commit 3a93bedea050 ("cxgb4: Remove unused vpd_param member ec") to avoid future merge conflicts, as that change has been applied to the PCI tree. Link: https://lore.kernel.org/r/20210823120929.7c6f7a4f@canb.auug.org.au/ Link: https://lore.kernel.org/r/1ca29408-7bc7-4da5-59c7-87893c9e0442@gmail.com/ Signed-off-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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cd3d5d68 |
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23-Aug-2021 |
David S. Miller <davem@davemloft.net> |
Revert "cxgb4: Validate VPD checksum with pci_vpd_check_csum()" This reverts commit 96ce96f151261e33a170cecb8a4fa664b45743ab. Signed-off-by: David S. Miller <davem@davemloft.net>
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82e34c8a |
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23-Aug-2021 |
David S. Miller <davem@davemloft.net> |
Revert "Revert "cxgb4: Search VPD with pci_vpd_find_ro_info_keyword()"" This reverts commit df6deaf6731519c6efd68ccd0638564e1afc4309. Signed-off-by: David S. Miller <davem@davemloft.net>
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df6deaf6 |
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23-Aug-2021 |
David S. Miller <davem@davemloft.net> |
Revert "cxgb4: Search VPD with pci_vpd_find_ro_info_keyword()" This reverts commit 8d63ee602da381c437c0a4ef7ea882b71d829eb6. Signed-off-by: David S. Miller <davem@davemloft.net>
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8d63ee60 |
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22-Aug-2021 |
Heiner Kallweit <hkallweit1@gmail.com> |
cxgb4: Search VPD with pci_vpd_find_ro_info_keyword() Use pci_vpd_find_ro_info_keyword() to search for keywords in VPD to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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3a93bede |
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22-Aug-2021 |
Heiner Kallweit <hkallweit1@gmail.com> |
cxgb4: Remove unused vpd_param member ec Member ec isn't used, so remove it. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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96ce96f1 |
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22-Aug-2021 |
Heiner Kallweit <hkallweit1@gmail.com> |
cxgb4: Validate VPD checksum with pci_vpd_check_csum() Validate the VPD checksum with pci_vpd_check_csum() to simplify the code. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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c7654495 |
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16-Jun-2021 |
Yang Yingliang <yangyingliang@huawei.com> |
net: chelsio: cxgb4: use eth_zero_addr() to assign zero address Using eth_zero_addr() to assign zero address insetad of inefficient copy from an array. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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e0333b1b |
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16-May-2021 |
Yang Shen <shenyang39@huawei.com> |
net: chelsio: cxgb4: Fix wrong function name in comments Fixes the following W=1 kernel build warning(s): drivers/net/ethernet/chelsio/cxgb3/sge.c:677: warning: expecting prototype for free_qset(). Prototype was for t3_free_qset() instead drivers/net/ethernet/chelsio/cxgb3/sge.c:1266: warning: expecting prototype for eth_xmit(). Prototype was for t3_eth_xmit() instead Cc: Raju Rangoju <rajur@chelsio.com> Signed-off-by: Yang Shen <shenyang39@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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f046bd0a |
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10-Jun-2021 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: fix sleep in atomic when flashing PHY firmware Before writing new PHY firmware to on-chip memory, driver queries firmware for current running PHY firmware version, which can result in sleep waiting for reply. So, move spinlock closer to the actual on-chip memory write operation, instead of taking it at the callers. Fixes: 5fff701c838e ("cxgb4: always sync access when flashing PHY firmware") Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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42a20397 |
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10-Jun-2021 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: fix endianness when flashing boot image Boot images are copied to memory and updated with current underlying device ID before flashing them to adapter. Ensure the updated images are always flashed in Big Endian to allow the firmware to read the new images during boot properly. Fixes: 550883558f17 ("cxgb4: add support to flash boot image") Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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4cf0abbc |
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01-Apr-2021 |
Heiner Kallweit <hkallweit1@gmail.com> |
PCI/VPD: Remove pci_vpd_find_tag() 'offset' argument All callers pass 0 as offset. Therefore remove the parameter and use a fixed offset 0 in pci_vpd_find_tag(). Link: https://lore.kernel.org/r/f62e6e19-5423-2ead-b2bd-62844b23ef8f@gmail.com Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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1bfb3dea |
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27-Mar-2021 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: avoid collecting SGE_QBASE regs during traffic Accessing SGE_QBASE_MAP[0-3] and SGE_QBASE_INDEX registers can lead to SGE missing doorbells under heavy traffic. So, only collect them when adapter is idle. Also update the regdump range to skip collecting these registers. Fixes: 80a95a80d358 ("cxgb4: collect SGE PF/VF queue map") Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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05fcc256 |
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20-Jan-2021 |
Heiner Kallweit <hkallweit1@gmail.com> |
cxgb4: remove bogus CHELSIO_VPD_UNIQUE_ID constant The comment is quite weird, there is no such thing as a vendor-specific VPD id. 0x82 is the value of PCI_VPD_LRDT_ID_STRING. So what we are doing here is simply checking whether the byte at VPD address VPD_BASE is a valid string LRDT, same as what is done a few lines later in the code. LRDT = Large Resource Data Tag, see PCI 2.2 spec, VPD chapter v2: - don't set VPD_BASE / VPD_BASE_OLD separately Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Link: https://lore.kernel.org/r/644ef22f-e86a-5cc1-0f27-f873ab165696@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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cca85283 |
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24-Aug-2020 |
Raju Rangoju <rajur@chelsio.com> |
cxgb4: add error handlers to LE intr_handler cxgb4 does not look for HASHTBLMEMCRCERR and CMDTIDERR bits in LE_DB_INT_CAUSE register, but these are enabled in LE_DB_INT_ENABLE. So, add error handlers to LE interrupt handler to emit a warning or alert message for hash table mem crc and cmd tid errors Signed-off-by: Raju Rangoju <rajur@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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df561f66 |
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23-Aug-2020 |
Gustavo A. R. Silva <gustavoars@kernel.org> |
treewide: Use fallthrough pseudo-keyword Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
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696c278f |
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30-Jun-2020 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: add main VI to mirror VI config replication When mirror VI is enabled, replicate various VI config params enabled on main VI to mirror VI. These include replicating MTU, promiscuous mode, all-multicast mode, and enabled netdev Rx feature offloads. v3: - Replace mirror VI refcount_t with normal u32 variable. - Add back calling cxgb4_port_mirror_start() in cxgb_open(), which was there in v1, but got missed in v2 during refactoring. v2: - Simplify the replication code by refactoring t4_set_rxmode() to handle mirror VI, instead of duplicating the t4_set_rxmode() calls in multiple places. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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fd2261d8 |
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30-Jun-2020 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: add mirror action to TC-MATCHALL offload Add mirror Virtual Interface (VI) support to receive all ingress mirror traffic from the underlying device. The mirror VI is created dynamically, if the TC-MATCHALL rule has a corresponding mirror action. Also request MSI-X vectors needed for the mirror VI Rxqs. If no vectors are available, then disable mirror VI support. v3: - Replace mirror VI refcount_t with normal u32 variable. v2: - Add mutex to protect all mirror VI data, instead of just mirror Rxqs. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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8a259e6b |
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29-Jun-2020 |
Li Heng <liheng40@huawei.com> |
net: cxgb4: fix return error value in t4_prep_fw t4_prep_fw goto bye tag with positive return value when something bad happened and which can not free resource in adap_init0. so fix it to return negative value. Fixes: 16e47624e76b ("cxgb4: Add new scheme to update T4/T5 firmware") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Li Heng <liheng40@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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5fff701c |
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23-Jun-2020 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: always sync access when flashing PHY firmware Access to on-chip memory for flashing PHY firmware must always be synchronized. So, ensure the callers take on-chip memory lock. Also fixes following sparse warning: sge.c:1641:26: warning: context imbalance in 't4_load_phy_fw' - different lock contexts for basic block Fixes: 01b6961410b7 ("cxgb4: Add PHY firmware support for T420-BT cards") Fixes: 4ee339e1e92a ("cxgb4: add support to flash PHY image") Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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29bbf5d7 |
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23-Jun-2020 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: update kernel-doc line comments Update several kernel-doc line comments to fix warnings reported by make W=1. Fixes following class of warnings reported by make W=1 in several places: l2t.c:616: warning: Cannot understand * @dev: net_device pointer t4_hw.c:3175: warning: Function parameter or member 'adap' not described in 't4_get_exprom_version' t4_hw.c:3175: warning: Excess function parameter 'adapter' description in 't4_get_exprom_version' Fixes: 56d36be4dd5f ("cxgb4: Add HW and FW support code") Fixes: fd3a47900b6f ("cxgb4: Add packet queues and packet DMA code") Fixes: 26f7cbc0a5a4 ("cxgb4: Don't attempt to upgrade T4 firmware when cxgb4 will end up as a slave") Fixes: 793dad94e745 ("RDMA/cxgb4: Fix bug for active and passive LE hash collision path") Fixes: ba3f8cd55f2a ("cxgb4: Add support in cxgb4 to get expansion rom version via ethtool") Fixes: f7502659cec8 ("cxgb4: Add API to alloc l2t entry; also update existing ones") Fixes: ddc7740d9a7c ("cxgb4: Decode link down reason code obtained from firmware") Fixes: 193c4c2845f7 ("cxgb4: Update T6 Buffer Group and Channel Mappings") Fixes: 8f46d46715a1 ("cxgb4: Use Firmware params to get buffer-group map") Fixes: a456950445a0 ("cxgb4: time stamping interface for PTP") Fixes: 9c33e4208bce ("cxgb4: Add PTP Hardware Clock (PHC) support") Fixes: c3168cabe1af ("cxgb4/cxgbvf: Handle 32-bit fw port capabilities") Fixes: 5ccf9d049615 ("cxgb4: update API for TP indirect register access") Fixes: 3bdb376e6944 ("cxgb4: introduce SMT ops to prepare for SMAC rewrite support") Fixes: 736c3b94474e ("cxgb4: collect egress and ingress SGE queue contexts") Fixes: f56ec6766dcf ("cxgb4: Add support for ethtool i2c dump") Fixes: 9d5fd927d20b ("cxgb4/cxgb4vf: add support for ndo_set_vf_vlan") Fixes: 98f3697f8d41 ("cxgb4: add tc flower match support for tunnel VNI") Fixes: 02d805dc5fe3 ("cxgb4: use new fw interface to get the VIN and smt index") Fixes: 3f8cfd0d95e6 ("cxgb4/cxgb4vf: Program hash region for {t4/t4vf}_change_mac()") Fixes: d429005fdf2c ("cxgb4/cxgb4vf: Add support for SGE doorbell queue timer") Fixes: 0e395b3cb1fb ("cxgb4: add FLOWC based QoS offload") Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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d5002c9a |
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18-Jun-2020 |
Vishal Kulkarni <vishal@chelsio.com> |
cxgb4: add support to flash boot cfg image Update set_flash to flash boot cfg image to flash region Signed-off-by: Vishal Kulkarni <vishal@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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55088355 |
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18-Jun-2020 |
Vishal Kulkarni <vishal@chelsio.com> |
cxgb4: add support to flash boot image Update set_flash to flash boot image to flash region Signed-off-by: Vishal Kulkarni <vishal@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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4bccfc03 |
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15-May-2020 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: tune burst buffer size for TC-MQPRIO offload For each traffic class, firmware handles up to 4 * MTU amount of data per burst cycle. Under heavy load, this small buffer size is a bottleneck when buffering large TSO packets in <= 1500 MTU case. Increase the burst buffer size to 8 * MTU when supported. Also, keep the driver's traffic class configuration API similar to the firmware API counterpart. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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c799fca8 |
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13-Apr-2020 |
Jason Gunthorpe <jgg@ziepe.ca> |
net/cxgb4: Check the return from t4_query_params properly Positive return values are also failures that don't set val, although this probably can't happen. Fixes gcc 10 warning: drivers/net/ethernet/chelsio/cxgb4/t4_hw.c: In function ‘t4_phy_fw_ver’: drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:3747:14: warning: ‘val’ may be used uninitialized in this function [-Wmaybe-uninitialized] 3747 | *phy_fw_ver = val; Fixes: 01b6961410b7 ("cxgb4: Add PHY firmware support for T420-BT cards") Signed-off-by: Jason Gunthorpe <jgg@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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1f074e67 |
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25-Mar-2020 |
Rahul Kundu <rahul.kundu@chelsio.com> |
cxgb4: Add support to catch bits set in INT_CAUSE5 This commit adds support to catch any bits set in SGE_INT_CAUSE5 for Parity Errors. F_ERR_T_RXCRC flag is used to ignore that particular bit as it is not considered as fatal. So, we clear out the bit before looking for error. This patch now read and report separately all three registers(Cause1, Cause2, Cause5). Also, checks for errors if any. Signed-off-by: Raju Rangoju <rajur@chelsio.com> Signed-off-by: Rahul Kundu <rahul.kundu@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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724d0215 |
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12-Mar-2020 |
Shahjada Abul Husain <shahjada@chelsio.com> |
cxgb4: update T5/T6 adapter register ranges Add more T5/T6 registers to be collected in register dump: 1. MPS register range 0x9810 to 0x9864 and 0xd000 to 0xd004. 2. NCSI register range 0x1a114 to 0x1a130 and 0x1a138 to 0x1a1c4. Signed-off-by: Shahjada Abul Husain <shahjada@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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0caeaf6a |
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30-Dec-2019 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4/cxgb4vf: fix flow control display for auto negotiation As per 802.3-2005, Section Two, Annex 28B, Table 28B-2 [1], when _only_ Rx pause is enabled, both symmetric and asymmetric pause towards local device must be enabled. Also, firmware returns the local device's flow control pause params as part of advertised capabilities and negotiated params as part of current link attributes. So, fix up ethtool's flow control pause params fetch logic to read from acaps, instead of linkattr. [1] https://standards.ieee.org/standard/802_3-2005.html Fixes: c3168cabe1af ("cxgb4/cxgbvf: Handle 32-bit fw port capabilities") Signed-off-by: Surendra Mobiya <surendra@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
4ec4762d |
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19-Nov-2019 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: add TC-MATCHALL classifier egress offload Add TC-MATCHALL classifier offload with TC-POLICE action applied for all outgoing traffic on the underlying interface. Split flow block offload to support both egress and ingress classification. For example, to rate limit all outgoing traffic to 1 Gbps: $ tc qdisc add dev enp2s0f4 clsact $ tc filter add dev enp2s0f4 egress matchall skip_sw \ action police rate 1Gbit burst 8Kbit Note that skip_sw is important. Otherwise, both stack and hardware will end up doing policing. Policing can't be shared across flow blocks. Only 1 egress matchall rule can be active at a time on the underlying interface. v5: - No change. v4: - Removed check to reject police offload if prio is not 1. - Moved TC_SETUP_BLOCK code to separate function. v3: - Added check to reject police offload if prio is not 1. - Assign block_shared variable only for TC_SETUP_BLOCK. v2: - Added check to reject flow block sharing for policers. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
172ca830 |
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10-Sep-2019 |
Arkadiusz Drabczyk <arkadiusz@drabczyk.org> |
cxgb4: Fix spelling typos Fix several spelling typos in comments in t4_hw.c. Signed-off-by: Arkadiusz Drabczyk <arkadiusz@drabczyk.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
6133b920 |
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17-Jul-2019 |
Frederick Lawler <fred@fredlawl.com> |
cxgb4: Prefer pcie_capability_read_word() Commit 8c0d3a02c130 ("PCI: Add accessors for PCI Express Capability") added accessors for the PCI Express Capability so that drivers didn't need to be aware of differences between v1 and v2 of the PCI Express Capability. Replace pci_read_config_word() and pci_write_config_word() calls with pcie_capability_read_word() and pcie_capability_write_word(). Signed-off-by: Frederick Lawler <fred@fredlawl.com> Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
f4aa8012 |
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25-May-2019 |
YueHaibing <yuehaibing@huawei.com> |
cxgb4: Make t4_get_tp_e2c_map static Fix sparse warning: drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:6216:14: warning: symbol 't4_get_tp_e2c_map' was not declared. Should it be static? Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
ab0610ef |
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22-May-2019 |
Vishal Kulkarni <vishal@chelsio.com> |
cxgb4: Revert "cxgb4: Remove SGE_HOST_PAGE_SIZE dependency on page size" This reverts commit 2391b0030e241386d710df10e53e2cfc3c5d4fc1 which has introduced regression. Now SGE's BAR2 Doorbell/GTS Page Size is interpreted correctly in the firmware itself by using actual host page size. Hence previous commit needs to be reverted. Signed-off-by: Vishal Kulkarni <vishal@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
dcf10ec7 |
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23-May-2019 |
Raju Rangoju <rajur@chelsio.com> |
cxgb4: use firmware API for validating filter spec Adds support for validating hardware filter spec configured in firmware before offloading exact match flows. Use the new fw api FW_PARAM_DEV_FILTER_MODE_MASK to read the filter mode and mask from firmware. If the api isn't supported, then fall-back to older way of reading just the mode from indirect register. Signed-off-by: Raju Rangoju <rajur@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
74dd5aa1 |
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22-May-2019 |
Vishal Kulkarni <vishal@chelsio.com> |
cxgb4: Enable hash filter with offload Hash (exact-match) filters used for offloading flows share the same active region resources on the chip with upper layer drivers, like iw_cxgb4, chcr, etc. Currently, only either Hash filters or ULDs can use the active region resources, but not both. Hence, use the new firmware configuration parameters (when available) to allow both the Hash filters and ULDs to share the active region simultaneously. Signed-off-by: Vishal Kulkarni <vishal@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
9f764898 |
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29-Mar-2019 |
Vishal Kulkarni <vishal@chelsio.com> |
cxgb4/cxgb4vf: Display advertised FEC in ethtool This patch advertises Forward Error Correction in ethtool Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Vishal Kulkarni <vishal@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
80f61f19 |
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04-Mar-2019 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4/chtls: Prefix adapter flags with CXGB4 Some of these macros were conflicting with global namespace, hence prefixing them with CXGB4. Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Vishal Kulkarni <vishal@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
64ccfd2d |
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16-Feb-2019 |
Vishal Kulkarni <vishal@chelsio.com> |
cxgb4: Mask out interrupts that are not enabled. There are rare cases where a PL_INT_CAUSE bit may end up getting set when the corresponding PL_INT_ENABLE bit isn't set. Signed-off-by: Vishal Kulkarni <vishal@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
d429005f |
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14-Feb-2019 |
Vishal Kulkarni <vishal@chelsio.com> |
cxgb4/cxgb4vf: Add support for SGE doorbell queue timer T6 introduced a Timer Mechanism in SGE called the SGE Doorbell Queue Timer. With this we can now configure TX Queues to get CIDX Updates when: Time(CIDX == PIDX) >= Timer Previously we rely on TX Queue Status Page updates by hardware for DMA completions. This will make Hardware/Firmware actually deliver the CIDX Updates as Ingress Queue messages with commensurate Interrupts. So we now have a new RX Path component for processing CIDX Updates and reclaiming TX Descriptors faster. Original work by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Vishal Kulkarni <vishal@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
95eb7882 |
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21-Jan-2019 |
Vishal Kulkarni <vishal@chelsio.com> |
cxgb4/cxgb4vf: Link management changes 1) Speed should be supported by Physical Port Capabilities. 2) report Forward Error Correction mode which are available. 3) Added few comments. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Vishal Kulkarni <vishal@chelsio.com> Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
fd21c89b |
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07-Jan-2019 |
Colin Ian King <colin.king@canonical.com> |
net: cxgb4: fix various indentation issues There are some lines that have indentation issues, fix these. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
21ab664a |
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24-Nov-2018 |
YueHaibing <yuehaibing@huawei.com> |
cxgb4: remove set but not used variables 'multitrc, speed' Fixes gcc '-Wunused-but-set-variable' warning: drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:5883:6: warning: variable 'multitrc' set but not used [-Wunused-but-set-variable] drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:8585:32: warning: variable 'speed' set but not used [-Wunused-but-set-variable] 'multitrc' never used since introduction in commit 8e3d04fd7d70 ("cxgb4: Add MPS tracing support") 'speed' never used since introduction in commit c3168cabe1af ("cxgb4/cxgbvf: Handle 32-bit fw port capabilities") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
02d805dc |
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21-Nov-2018 |
Santosh Rastapur <santosh@chelsio.com> |
cxgb4: use new fw interface to get the VIN and smt index If the fw supports returning VIN/VIVLD in FW_VI_CMD save it in port_info structure else retrieve these from viid and save them in port_info structure. Do the same for smt_idx from FW_VI_MAC_CMD Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
2391b003 |
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15-Nov-2018 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: Remove SGE_HOST_PAGE_SIZE dependency on page size The SGE Host Page Size has nothing to do with the actual Host Page Size. It's the SGE's BAR2 Doorbell/GTS Page Size for interpreting the SGE Ingress/Egress Queue per Page values. Firmware reads all of these things and makes all the subsequent changes necessary. The Host Driver uses the SGE Host Page Size in order to properly calculate BAR2 Offsets. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
a657dbf6 |
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05-Oct-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: use FW_PORT_ACTION_L1_CFG32 for 32 bit capability when 32 bit port capability is in use, use FW_PORT_ACTION_L1_CFG32 rather than FW_PORT_ACTION_L1_CFG. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
0dc235af |
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14-Sep-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: Fix endianness issue in t4_fwcache() Do not put host-endian 0 or 1 into big endian feild. Reported-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
25290bfc |
|
10-Sep-2018 |
Colin Ian King <colin.king@canonical.com> |
cxgb4: remove redundant assignment to vlan_cmd.dropnovlan_fm A recent commit updated vlan_cmd.dropnovlan_fm but failed to remove the older assignment. Fix this by removing the former redundant assignment. Detected by CoverityScan, CID#1473290 ("Unused value") Fixes: a89cdd8e7c74 ("cxgb4: impose mandatory VLAN usage when non-zero TAG ID") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
a89cdd8e |
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07-Sep-2018 |
Casey Leedom <leedom@chelsio.com> |
cxgb4: impose mandatory VLAN usage when non-zero TAG ID When a non-zero VLAN Tag ID is passed to t4_set_vlan_acl() then impose mandatory VLAN Usage with that VLAN ID. I.e any other VLAN ID should result in packets getting dropped. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
d135955f |
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07-Aug-2018 |
Gustavo A. R. Silva <gustavo@embeddedor.com> |
cxgb4/t4_hw: mark expected switch fall-throughs In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 114777 ("Missing break in switch") Addresses-Coverity-ID: 114778 ("Missing break in switch") Addresses-Coverity-ID: 114779 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
843789f6 |
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06-Jul-2018 |
Casey Leedom <leedom@chelsio.com> |
cxgb4: assume flash part size to be 4MB, if it can't be determined t4_get_flash_params() fails in a fatal fashion if the FLASH part isn't one of the recognized parts. But this leads to desperate efforts to update drivers when various FLASH parts which we are using suddenly become unavailable and we need to substitute new FLASH parts. This has lead to more than one Customer Field Emergency when a Customer has an old driver and suddenly can't use newly shipped adapters. This commit fixes this by simply assuming that the FLASH part is 4MB in size if it can't be identified. Note that all Chelsio adapters will have flash parts which are at least 4MB in size. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
0eaec62a |
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04-Jul-2018 |
Casey Leedom <leedom@chelsio.com> |
cxgb4: Add support to read actual provisioned resources In highly constrained resources environments (like the 124VF T5 and 248VF T6 configurations), PF4 may not have very many resources at all and we need to adapt to whatever we've been allocated, this patch adds support to get the provisioned resources. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
c5f732d7 |
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30-May-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: Add FORCE_PAUSE bit to 32 bit port caps Add FORCE_PAUSE bit to force local pause settings instead of using auto negotiated values. Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
e2f4f4e9 |
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24-May-2018 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4/cxgb4vf: Notify link changes to OS-dependent code We have a confusion of two different abstractions in the Common Code: Physical Link (Port) and Logical Network Interface (Virtual Interface), and we haven't been properly managing the state of the intersection of those two abstractions. On the one hand we have the Physical state of the Link -- up or down -- and on the other we have the logical state of the VI, enabled or not. {ethN} refers to both the Physical and Logical State. In this case, ifconfig only affects/interrogates the Logical State of a VI, and ethtool only deals with the Physical State. And these are different. So, just because we disable the VI, we don't really want to change the Physical Link Up/Down state. Thus, the previous hack to set "lc->link_ok = 0" when we disable a VI is completely incorrect. Where we get into trouble is where the Physical Link State and the Logical VI State cross swords. And that happens in t4_handle_get_port_info() where we need to manage/safe the Physical Link State, but we also need to know when the Logical VI State has changed and pass that back up to the OS-dependent Driver routine t4_os_link_changed() which is concerned about the Logical Interface. So we enable a VI and that causes Firmware to send us a new Port Information message, but if none of the Physical Link State particulars have changed, we don't call t4_os_link_changed(). This fix uses the existing OS Contract APIs for the Common Code to inform the OS-dependent portion of the Host Driver when the "Link" (really Logical Network Interface) is "up" or "down". A new API t4_enable_pi_params() is added which calls t4_enable_vi_params() and, if that is successful, then calls back to the OS Contract API t4_os_link_changed() notifying the OS-dependent layer of the potential Link State change. Original Work by : Casey Leedom <leedom@chelsio.com> Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
57ccaedb |
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24-May-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4/cxgb4vf: link management changes for new SFP newer SFPs like SFP28 and QSFP28 Transceiver Modules present several new possibilities which we haven't faced before. Fix the assumptions in the code reflecting the more limited capabilities of previous Transceiver Module systems Original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
8156b0ba |
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23-May-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: do L1 config when module is inserted trigger an L1 configure operation when a transceiver module is inserted in order to cause current "sticky" options like Requested Forward Error Correction to be reapplied. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
1d19023f |
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23-May-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: change the port capability bits definition MDI Port Capabilities bit definitions were inconsistent with regard to the MDI enum values. 2 bits used to define MDI in the port capabilities are not really separable, it's a 2-bit field with 4 different values. Change the port capability bit definitions to be "AUTO" and "STRAIGHT" in order to get them to line up with the enum's. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
98f3697f |
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14-May-2018 |
Kumar Sanghvi <kumaras@chelsio.com> |
cxgb4: add tc flower match support for tunnel VNI Adds support for matching flows based on tunnel VNI value. Introduces fw APIs for allocating/removing MPS entries related to encapsulation. And uses the same while adding/deleting filters for offloading flows based on tunnel VNI match. Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
0f1417f9 |
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23-Mar-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: support new ISSI flash parts Add support for new 32MB and 64MB ISSI (Integrated Silicon Solution, Inc.) FLASH parts. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
b46f7da1 |
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23-Mar-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: depend on firmware event for link status Depend on the firmware sending us link status changes, rather than assuming that the link goes down upon L1 configuration. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
8b4e6b3c |
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13-Mar-2018 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: Add HMA support HMA(Host Memory Access) maps a part of host memory for T6-SO memfree cards. This commit does the following: - Query FW to check if we have HMA support. If yes, the params will return HMA size configured in FW. We will dma map memory based on this size. - Also contains changes to get HMA memory information via debugfs. Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Michael Werner <werner@chelsio.com> Signed-off-by: Ganesh GR <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
3c34cb9d |
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02-Mar-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: Add TP Congestion map entry for single-port Add TP Congestion Map entry for single-port T6 cards. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
7dcf688d |
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15-Feb-2018 |
Casey Leedom <leedom@chelsio.com> |
PCI/cxgb4: Extend T3 PCI quirk to T4+ devices We've run into a problem where our device is attached to a Virtual Machine and the use of the new pci_set_vpd_size() API doesn't help. The VM kernel has been informed that the accesses are okay, but all of the actual VPD Capability Accesses are trapped down into the KVM Hypervisor where it goes ahead and imposes the silent denials. The right idea is to follow the kernel.org commit 1c7de2b4ff88 ("PCI: Enable access to non-standard VPD for Chelsio devices (cxgb3)") which Alexey Kardashevskiy authored to establish a PCI Quirk for our T3-based adapters. This commit extends that PCI Quirk to cover Chelsio T4 devices and later. The advantage of this approach is that the VPD Size gets set early in the Base OS/Hypervisor Boot and doesn't require that the cxgb4 driver even be available in the Base OS/Hypervisor. Thus PF4 can be exported to a Virtual Machine and everything should work. Fixes: 67e658794ca1 ("cxgb4: Set VPD size so we can read both VPD structures") Cc: <stable@vger.kernel.org> # v4.9+ Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
1a4330cd |
|
13-Feb-2018 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: rework on-chip memory read Rework logic to read EDC and MC. Do 32-bit reads at a time. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
ebb5568f |
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26-Jan-2018 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: fix incorrect condition for using firmware LDST commands Only contact firmware if it's alive _AND_ if use_bd (use backdoor access) is not set when issuing FW_LDST_CMD. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
825b2b6f |
|
26-Jan-2018 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: reset FW_OK flag on firmware crash If firmware reports error, reset FW_OK flag. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
d9ac2d99 |
|
25-Jan-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: fix possible deadlock t4_wr_mbox_meat_timeout() can be called from both softirq context and process context, hence protect the mbox with spin_lock_bh() instead of simple spin_lock() Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
9d5fd927 |
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24-Jan-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4/cxgb4vf: add support for ndo_set_vf_vlan implement ndo_set_vf_vlan for mgmt netdevice to configure the PCIe VF. Original work by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
846eac3f |
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10-Jan-2018 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: implement udp tunnel callbacks Implement ndo_udp_tunnel_add and ndo_udp_tunnel_del to support vxlan tunnelling. Original work by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
15962a18 |
|
02-Jan-2018 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: Fix FW flash errors commit 96ac18f14a5a ("cxgb4: Add support for new flash parts") removed initialization of adapter->params.sf_fw_start causing issues while flashing firmware to card. We no longer need sf_fw_start in adapter->params as we already have macros defined for FW flash addresses. Fixes: 96ac18f14a5a ("cxgb4: Add support for new flash parts") Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b39ab140 |
|
27-Dec-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4/cxgb4vf: support for XLAUI Port Type Add support for new Backplane XLAUI port type. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f988008a |
|
18-Dec-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: RSS table is 4k for T6 RSS table is 4k for T6 and later cards, add check for the same. Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
962b5827 |
|
15-Dec-2017 |
Bjorn Helgaas <bhelgaas@google.com> |
cxgb4: Simplify PCIe Completion Timeout setting Simplify PCIe Completion Timeout setting by using the pcie_capability_clear_and_set_word() interface. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f56ec676 |
|
12-Dec-2017 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: Add support for ethtool i2c dump Adds support for ethtool get_module_info() and get_module_eeprom() callbacks that will dump necessary information for a SFP. Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
736c3b94 |
|
07-Dec-2017 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: collect egress and ingress SGE queue contexts Use meminfo to identify the egress and ingress context regions and fetch all valid contexts from those regions. Also flush all contexts before attempting collection to prevent stale information. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
4db0401f |
|
07-Dec-2017 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: collect HMA memory dump Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
9e5c598c |
|
11-Nov-2017 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: collect SGE queue context dump Collect SGE freelist queue and congestion manager contexts. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
940c9c45 |
|
10-Nov-2017 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: collect vpd info directly from hardware Collect vpd information directly from hardware instead of software adapter context. Move EEPROM physical address to virtual address translation logic to t4_hw.c and update relevant files. Fixes: 6f92a6544f1a ("cxgb4: collect hardware misc dumps") Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
0ba9a3b6 |
|
31-Oct-2017 |
Kumar Sanghvi <kumaras@chelsio.com> |
cxgb4: save additional filter tuple field shifts in tp_params Save additional filter tuple field shifts in tp_params based on configured filter tuple fields. Also, save the combined filter tuple mask based on configured filter tuple fields. Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
08c4901b |
|
26-Oct-2017 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: collect hardware scheduler dumps Collect hardware TX traffic scheduler and pace tables. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
5dc87425 |
|
13-Oct-2017 |
Colin Ian King <colin.king@canonical.com> |
cxgb4: fix missing break in switch and indent return statements The break statement for the Macronix case is missing and will fall through to the Winbond case and re-assign the size setting. Fix this by adding the missing break statement. Also correctly indent the return statements. Detected by CoverityScan, CID#1458020 ("Missing break in switch") Fixes: 96ac18f14a5a ("cxgb4: Add support for new flash parts") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
4359cf33 |
|
13-Oct-2017 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: collect TP dump Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
5ccf9d04 |
|
13-Oct-2017 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: update API for TP indirect register access Try to access TP indirect registers via firmware first. If this fails, fallback and access them directly. This ensures that driver and firmware do not conflict each other while accessing the TP indirect registers. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
96ac18f1 |
|
09-Oct-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: Add support for new flash parts Add support for new flash parts identification, and also cleanup the flash Part identifying and decoding code. Based on the original work of Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ef18e3b9 |
|
03-Sep-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: Ignore MPS_TX_INT_CAUSE[Bubble] for T6 MPS_TX_INT_CAUSE[Bubble] is a normal condition for T6, hence ignore this interrupt for T6. Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
2de489f4 |
|
03-Sep-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: Fix pause frame count in t4_get_port_stats MPS_STAT_CTL[CountPauseStatTx] and MPS_STAT_CTL[CountPauseStatRx] only control whether or not Pause Frames will be counted as part of the 64-Byte Tx/Rx Frame counters. These bits do not control whether Pause Frames are counted in the Total Tx/Rx Frames/Bytes counters. Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
0f308686 |
|
25-Aug-2017 |
Stefano Brivio <sbrivio@redhat.com> |
cxgb4: Fix stack out-of-bounds read due to wrong size to t4_record_mbox() Passing commands for logging to t4_record_mbox() with size MBOX_LEN, when the actual command size is actually smaller, causes out-of-bounds stack accesses in t4_record_mbox() while copying command words here: for (i = 0; i < size / 8; i++) entry->cmd[i] = be64_to_cpu(cmd[i]); Up to 48 bytes from the stack are then leaked to debugfs. This happens whenever we send (and log) commands described by structs fw_sched_cmd (32 bytes leaked), fw_vi_rxmode_cmd (48), fw_hello_cmd (48), fw_bye_cmd (48), fw_initialize_cmd (48), fw_reset_cmd (48), fw_pfvf_cmd (32), fw_eq_eth_cmd (16), fw_eq_ctrl_cmd (32), fw_eq_ofld_cmd (32), fw_acl_mac_cmd(16), fw_rss_glb_config_cmd(32), fw_rss_vi_config_cmd(32), fw_devlog_cmd(32), fw_vi_enable_cmd(48), fw_port_cmd(32), fw_sched_cmd(32), fw_devlog_cmd(32). The cxgb4vf driver got this right instead. When we call t4_record_mbox() to log a command reply, a MBOX_LEN size can be used though, as get_mbox_rpl() will fill cmd_rpl up completely. Fixes: 7f080c3f2ff0 ("cxgb4: Add support to enable logging of firmware mailbox commands") Signed-off-by: Stefano Brivio <sbrivio@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c3168cab |
|
20-Aug-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4/cxgbvf: Handle 32-bit fw port capabilities Implement new 32-bit Firmware Port Capabilities in order to handle new speeds which couldn't be represented in the old 16-bit Firmware Port Capabilities values. Based on the original work of Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
4da18741 |
|
07-Aug-2017 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: Clear On FLASH config file after a FW upgrade Because Firmware and the Firmware Configuration File need to be in sync; clear out any On-FLASH Firmware Configuration File when new Firmware is loaded. This will avoid difficult to diagnose and fix problems with a mis-matched Firmware Configuration File which prevents the adapter from being initialized. Original work by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
158a5c0a |
|
27-Jul-2017 |
Casey Leedom <leedom@chelsio.com> |
cxgb4: core hardware/firmware support for Forward Error Correction on a link Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
760446f9 |
|
20-Jul-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: display serial config and vpd versions print the versions of vpd and serial configuration file, flashed to adapter, and cleanup the relevant code. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
04d8980b |
|
19-Jul-2017 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: Update register ranges of T4/T5/T6 adapters Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
8f46d467 |
|
23-Jun-2017 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: Use Firmware params to get buffer-group map Buffer group mappings can be obtained using FW_PARAMs cmd for newer FW. Since some of the bg_maps are obtained in atomic context, created another t4_query_params_ns(), that wont sleep when awaiting mbox cmd completion. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
193c4c28 |
|
23-Jun-2017 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: Update T6 Buffer Group and Channel Mappings We were using t4_get_mps_bg_map() for both t4_get_port_stats() to determine which MPS Buffer Groups to report statistics on for a given Port, and also for t4_sge_alloc_rxq() to provide a TP Ingress Channel Congestion Map. For T4/T5 these are actually the same values (because they are ~somewhat~ related), but for T6 they should return different values (T6 has Port 0 associated with MPS Buffer Group 0 (with MPS Buffer Group 1 silently cascading off) and Port 1 is associated with MPS Buffer Group 2 (with 3 cascading off)). Based on the original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
38b6ec50 |
|
13-Jun-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: handle serial flash interrupt If SF bit is not cleared in PL_INT_CAUSE, subsequent non-data interrupts are not raised. Enable SF bit in Global Interrupt Mask and handle it as non-fatal and hence eventually clear it. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
d86cc04e |
|
08-Jun-2017 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: handle interrupt raised when FW crashes Handle TIMER0INT when FW crashes. Check for PCIE_FW[FW_EVAL] and if it says "Device FW Crashed", then treat it as fatal. Else, non-fatal. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b3fd8220 |
|
07-Jun-2017 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: fix to bring link down after adapter crash Use PORT_REG for T4 and T5_PORT_REG for > T4 to write to correct register to bring down link during shutdown after adapter crash. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a97051f4 |
|
31-May-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: fix incorrect cim_la output for T6 take care of UpDbgLaRdPtr[0-3] restriction for T6. Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
26747211 |
|
30-May-2017 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: FW upgrade fixes Disable FW_OK flag while flashing Firmware. This will help to fix any potential mailbox timeouts during Firmware flash. Grab new devlog parameters after Firmware restart. When we FLASH new Firmware onto an adapter, the new Firmware may have the Firmware Device Log located at a different memory address or have a different size for it. Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
025d0973 |
|
28-May-2017 |
Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com> |
cxgb4: avoid crash on PCI error recovery path During PCI error recovery process, specifically on eeh_err_detected() we might have a NULL netdev struct, hence a direct dereference will lead to a kernel oops. This was observed with latest upstream kernel (v4.12-rc2) on Chelsio adapter T422-CR in PowerPC machines. This patch checks for NULL pointer and avoids the crash, both in eeh_err_detected() and eeh_resume(). Also, we avoid to trigger a fatal error or to try disabling interrupts on FW during PCI error recovery, because: (a) driver might not be able to accurately access PCI regions in this case, and (b) trigger a fatal error _during_ the recovery steps is a mistake that could prevent the recovery path to complete successfully. Reported-by: Harsha Thyagaraja <hathyaga@in.ibm.com> Signed-off-by: Guilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
2061ec3f |
|
19-May-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4 : retrieve port information from firmware issue get port information command to firmware to retrieve port information and update if it is different from what was last recorded and also add indication for supported link modes for firmware port types FW_PORT_TYPE_SFP28, FW_PORT_TYPE_KR_SFP28, FW_PORT_TYPE_CR4_QSFP. Based on the original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
3bb4858f |
|
06-May-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: avoid disabling FEC by default Recent Chelsio firmware started using few port capablity bits to manage FEC and as driver was not aware of FEC changes those bits were zeroed, consequently disabling FEC. Avoid zeroing those bits and default to whatever the firmware tells us the Link is currently advertising. Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
bb58d079 |
|
20-Mar-2017 |
Arjun Vynipadath <arjun@chelsio.com> |
cxgb4: Update IngPad and IngPack values We are using the smallest padding boundary (8 bytes), which isn't smaller than the Memory Controller Read/Write Size We get best performance in 100G when the Packing Boundary is a multiple of the Maximum Payload Size. Its related to inefficient chopping of DMA packets by PCIe, that causes more overhead on bus. So driver is helping by making the starting address alignment to be MPS size. We will try to determine PCIE MaxPayloadSize capabiltiy and set IngPackBoundary based on this value. If cache line size is greater than MPS or determinig MPS fails, we will use cache line size to determine IngPackBoundary(as before). Signed-off-by: Arjun Vynipadath <arjun@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
3be0679b |
|
13-Jan-2017 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Shutdown adapter if firmware times out or errors out Perform an emergency shutdown of the adapter and stop it from continuing any further communication on the ports or DMA to the host. This is typically used when the adapter and/or firmware have crashed and we want to prevent any further accidental communication with the rest of the world. This will also force the port Link Status to go down -- if register writes work -- which should help our peers figure out that we're down. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f750e82e |
|
13-Jan-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: Fix misleading packet/frame count stats. Do not count pause frames as part of general TX/RX frame counters. Based on the original work of Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
89eb9835 |
|
06-Jan-2017 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4: Add port description for new cards. Add port description for 25G and 100G cards, and also change few port descriptions in compliance with the new naming convention. Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
4055ae5e |
|
05-Jan-2017 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Synchronize access to mailbox The issue comes when there are multiple threads attempting to use the mailbox facility at the same time. When DCB operations and interface up/down is run in a loop for every 0.1 sec, we observed mailbox collisions. And out of the two commands one would fail with the present code, since we don't queue the second command. To overcome the above issue, added a queue to access the mailbox. Whenever a mailbox command is issued add it to the queue. If its at the head issue the mailbox command, else wait for the existing command to complete. Usually command takes less than a milli-second to complete. Also timeout from the loop, if the command under execution takes long time to run. In reality, the number of mailbox access collisions is going to be very rare since no one runs such abusive script. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
8eb9f2f9 |
|
04-Jan-2017 |
Arjun V <arjun@chelsio.com> |
cxgb4: Support compressed error vector for T6 t6fw-1.15.15.0 enabled compressed error vector in cpl_rx_pkt for T6. Updating driver to take care of these changes. Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Arjun V <arjun@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
d2a007ab |
|
08-Dec-2016 |
Arjun V <arjun@chelsio.com> |
cxgb4/cxgb4vf: Assign netdev->dev_port with port ID Added missing dev_port assignment in cxgb4vf driver. Also made dev_port assignment of cxgb4 in sync with cxgb4vf driver. Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Arjun V <arjun@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
9b86a8d1 |
|
19-Sep-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf: Allocate more queues for 25G and 100G adapter We were missing check for 25G and 100G while checking port speed, which lead to less number of queues getting allocated for 25G & 100G adapters and leading to low throughput. Adding the missing check for both NIC and vNIC driver. Also fixes port advertisement for 25G and 100G in ethtool output. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
661dbeb9 |
|
02-Sep-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support for ndo_get_vf_config Adds support for ndo_get_vf_config, also fill the default mac address that will be provided to the VF by firmware, in case user doesn't provide one. So user can get the default MAC address address also through ndo_get_vf_config. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b72a32da |
|
22-Aug-2016 |
Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> |
cxgb4: add support for tx traffic scheduling classes Add support to create tx traffic scheduling classes with specified scheduling parameters. Return an existing class if a match is found with same scheduling parameters. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
858aa65c |
|
11-Aug-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf: Add set VF mac address support Add ndo_set_vf_mac support which allows to set the MAC address for cxgb4vf interfaces from the host Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
eb97ad99 |
|
21-Jul-2016 |
Ganesh Goudar <ganeshgr@chelsio.com> |
cxgb4/cxgb4vf: Add link mode mask API to cxgb4 and cxgb4vf Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Ganesh Goudar <ganeshgr@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f358738b |
|
03-May-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Check for firmware errors in the mailbox command loop Check for firmware errors in the mailbox command loop and report them differently rather than simply timing out when the firmware goes belly up. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
5a20f5cf |
|
03-May-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Don't sleep when mbox cmd is issued from interrupt context When link goes down, from the interrupt handler DCB priority for the Tx queues needs to be unset. We issue mbox command to unset the Tx queue priority with negative timeout. In t4_wr_mbox_meat_timeout() do not sleep when negative timeout is passed, since it is called from interrupt context. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
7f080c3f |
|
28-Apr-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support to enable logging of firmware mailbox commands Add new /sys/kernel/debug/ support to dump a firmware mailbox command issued and replies for debugging purpose. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ddc7740d |
|
26-Apr-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Decode link down reason code obtained from firmware Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
23853a0a |
|
26-Apr-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Don't assume FW_PORT_CMD reply is always port info msg The firmware can send a set of asynchronous replies through FW_PORT_CMD with DCBX information when that's negotiated with the Link Peer. The old code always assumed that a FW_PORT_CMD reply was always a Get Port Information message. This change conditionalizes the code to only handle the Get Port Information messages and throws a warning if we don't understand what we've been given. Also refactor t4_handle_fw_rpl() so that core functionality performed by t4_handle_get_port_info() for a specified port. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c3e324e3 |
|
26-Apr-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Refactor t4_port_init function Refactor t4_port_init() so that the core functionality is done by t4_init_portinfo() for a particular port. Also rename variables to sensible ones. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
0de72738 |
|
26-Apr-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: add new routine to get adapter info Add new routine to print out general adapter information (various version numbers, adapter name, part number, serial number, etc.) and remove redundant information dumped in the Port Information. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
67e65879 |
|
15-Apr-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Set VPD size so we can read both VPD structures Chelsio adapters have two VPD structures stored in the VPD: - offset 0x000: an abbreviated VPD, and - offset 0x400: the complete VPD. After 104daa71b396 ("PCI: Determine actual VPD size on first access"), the PCI core computes the valid VPD size by parsing the VPD starting at offset 0x0. That size only includes the abbreviated VPD structure, so reads of the complete VPD at 0x400 fail. Explicitly set the VPD size with pci_set_vpd_size() so the driver can read both VPD structures. [bhelgaas: changelog, split patches, rename to pci_set_vpd_size() and return int (not ssize_t)] Fixes: 104daa71b396 ("PCI: Determine actual VPD size on first access") Tested-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
|
#
ebf4dc2b |
|
10-Apr-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Stop Rx Queues before freeing it up Stop all Ethernet RX Queues before freeing up various Ingress/Egress Queues, etc. We were seeing cases of Ingress Queues not getting serviced during the shutdown process leading to Ingress Paths jamming up through the chip and blocking the shutdown effort itself. One such case involved the Firmware sending a "Flush Token" through the ULP-TX -> ULP-RX path for an Ethernet TX Queue being freed in order to make sure there weren't any remaining TX Work Requests in the pipeline. But the return path was stalled by Ingress Data unable to be delivered to the Host because those Ingress Queues were no longer being serviced. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
fc08a01a |
|
15-Feb-2016 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Use __dev_uc_sync/__dev_mc_sync to sync MAC address Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
2216d014 |
|
23-Dec-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Update SGE context congestion map change for T6 adapter SGE context congestion map changed from 4 to 8 priority per port in T6 as there are only 2 channels. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
6df39753 |
|
23-Dec-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Update correct encoding of SGE Ingress DMA States for T6 adapter Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
e9faeab8 |
|
23-Dec-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Update Congestion Channel map for T6 adapter Updating Congestion Channel/Priority Map in Congestion Manager Context for T6. In T6 port 0 is mapped to channel 0 and port 1 is mapped to channel 1. For 2 port T4/T5 adapter, port 0 is mapped to channel 0,1 and port 1 is mapped to channel 2,3 Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
676d6a75 |
|
23-Dec-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Update register range and SGE registers for T6 adapter Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
acac5962 |
|
23-Dec-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf: Update Ingress padding boundary values for T6 adapter Ingress padding boundary values got changed for T6. T5: 0=32B 1=64B 2=128B 3=256B 4=512B 5=1024B 6=2048B 7=4096B T6: 0=8B 1=16B 2=32B 3=64B 4=128B 5=128B 6=256B 7=512B Updating the driver to set the correct boundary values in SGE_CONTROL to 32B. Also, need to take care of this fl alignment change when calculating the next packet offset. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
44588560 |
|
23-Dec-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Update pm_stats for T6 adapter family Updated pm_stats code to display input FIFO wait (index 5) and read latency (index 7) counters for T6 adapters Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
21d11bd6 |
|
07-Oct-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Enhance driver to update FW, when FW is too old t4_check_fw_version() can return several error codes (-EINVAL, -EBUSY, -EAGAIN). The present code sets the adapter state to UNINIT only if its an EFAULT. In all the error cases set the adapter to uninitialized state. In t4_check_fw_version() if call to t4_get_fw_version() fails, repeat the operation a few times before returning failure. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
8119c018 |
|
01-Oct-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4 : Update T4/T5/T6 register ranges Update T4/T5/T6 adapter register ranges so that it doesn't read non existent registers when dumped using ethtool Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a69265e9 |
|
27-Aug-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Force uninitialized state if FW in adapter is unsupported Forcing uninitialized state allows us to upgrade and reinitialize the adapter. FW_VERSION_T4 = 1.4.0.0 FW_VERSION_T5 = 0.0.0.0 FW_VERSION_T6 = 0.0.0.0 At this point driver supports above and greater than above version. If FW in adapter < min FW_VERSION driver supports tries to upgrade the FW If FW in adapter >= FW_VERSION driver supports then it follows normal path Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
8e3d04fd |
|
12-Aug-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add MPS tracing support Handle TRACE_PKT, stack can sniff them on the first port Add debubfs enrty to configure tracing for offload traffic like iWARP & iSCSI for debugging purpose. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f109ff11 |
|
04-Aug-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Update T6 register ranges Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
d86bd29e |
|
04-Aug-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf: read the correct bits of PL Who Am I register Read the correct bits of PL Who Am I for the Source PF field which has changed in T6 Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
bf8ebb67 |
|
04-Aug-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support to dump edc bist status Add support to dump edc bist status for ECC data errors Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
0b2c2a93 |
|
21-Jul-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add debugfs entry to enable backdoor access Add debugfs entry 'use_backdoor' to enable backdoor access to read sge context. By default, we read sge context's via firmware. In case of FW issues, one can enable backdoor access via debugfs to dump sge context for debugging purpose. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
df459ebc |
|
07-Jul-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Read stats for only available channels Updating the driver to read the stats of only available channels. T6 and later has only 2 channels Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
5b4e83e1 |
|
07-Jul-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Update register ranges for T6 adapter Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
66cf188e |
|
09-Jun-2015 |
Hariprasad S <hariprasad@chelsio.com> |
cxgb4: Support for user mode bar2 mappings with T4 Enhance cxgb4_t4_bar2_sge_qregs() and cxgb4_bar2_sge_qregs() to support T4 user mode mappings. Update all the current users as well. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
|
#
7864026b |
|
09-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add debugfs entry to dump channel rate Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
19689609 |
|
09-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add debugfs entry to dump CIM PIF logic analyzer contents Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
26fae93f |
|
09-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add a debugfs entry to dump CIM MA logic analyzer logs Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
513d1a1d |
|
05-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fix static checker warning The patch e85c9a7abfa4: ("cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers") from Dec 3, 2014, leads to the following static checker warning: drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:5358 t4_bar2_sge_qregs() warn: should '(qid >> qpp_shift) << page_shift' be a 64 bit type? This patch fixes it Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c1e9af0c |
|
05-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Use FW LDST cmd to access TP_PIO_{ADDR, DATA} register first The TP_PIO_{ADDR,DATA} registers are are in conflict with the firmware's use of these registers. Added a routine to access it through FW LDST cmd. Access all TP_PIO_{ADDR,DATA} register access through new routine if FW is alive. If firmware is dead, than fall back to indirect access. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
eca0f6ee |
|
05-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: program pci completion timeout Set pci completion timeout to 0xd. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
098ef6c2 |
|
05-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Set mac addr from vpd, when we can't contact firmware Grab the Adapter MAC Address out of the VPD and use it for the "debug" network interface when either we can't contact the firmware Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
4036da90 |
|
05-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Rename t4_link_start() to t4_link_l1cfg t4_link_start() was completely misnamed. It does _not_ start up the link. It merely does the L1 Configuration for the link. The Link Up process is started automatically by the firmware when the number of enabled Virtual Interfaces on a port goes from 0 to 1. So renaming this routine to t4_link_l1cfg() for better documentation. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
5d700ecb |
|
05-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add sge ec context flush service Add function to flush the sge ec context cache, and utilize this new function in the driver Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
4f3a0fcf |
|
05-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Free Virtual Interfaces in remove routine Free VI interfaces in remove routine. If we don't do this then the firmware will never drop the physical link to the peer. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
e2d14b42 |
|
03-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Remove WOL get/set ethtool support Remove ethtool get/set support for wake on lan, adapter doesn't support it. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
65046e84 |
|
03-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support to dump loopback port stats Add support in ethtool to dump loopback port statistics Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a6222975 |
|
03-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support in ethtool to dump channel stats Add support in ethtool to dump adapter channel stats Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a4cfd929 |
|
03-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add ethtool support to get adapter stats Add ethtool support to get adapter specific hardware statistics Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
3ccc6cf7 |
|
02-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Adds support for T6 adapter Adds NIC driver related changes for T6 adapter. Register related changes, MC related changes, VF related changes, doorbell related changes, debugfs changes, etc Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ab4b583b |
|
02-Jun-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add is_t6 macro and T6 register ranges Adds new macro is_t6 and adds the register address range for T6 adapter Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b2612722 |
|
27-May-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf: function and argument name cleanup This patch changes variable name 'fn' to 'pf' of structure adapter. A 'fn' usually stands for PCI function which could be a PF or a VF. However, the use of this particular variable is explicitly limited to PF only. So, be specific about it in the variable name. Also corrects arguments passed for fn t4_ofld_eq_free, t4_ctrl_eq_free, t4_eth_eq_free, t4_iq_free, t4_alloc_vi, t4_fw_hello, t4_wr_mbox and t4_cfg_pfvf function. Also renames cxgb4_t4_bar2_sge_qregs to t4_bar2_sge_qregs and renames the latter function name in cxgb4vf driver to t4vf_bar2_sge_qregs to avoid conflicts. Also fixes alignment for these function. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
01b69614 |
|
22-May-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add PHY firmware support for T420-BT cards Add support for flashing 10GBaseT adapter with BCM 84834 PHY and Aquantia AQ1202 PHY. Updating of the PHY firmware must happen before the INITIALIZE_CMD. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
9f5ac48d |
|
20-May-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Update T4/T5 adapter register ranges Remove some T4/T5 registers that were included incorrectly. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b562fc37 |
|
20-May-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Optimize and cleanup setup memory window code Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f404f80c |
|
19-May-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: replace ntoh{s, l} and hton{s, l} calls with the generic byteorder replace ntoh{s,l} and hton{s,l} calls with the generic byteorder in cxgb4/t4_hw.c file Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
75daacc7 |
|
19-May-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Remove dead function t4_read_edc and t4_read_mc Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c035e183 |
|
06-May-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Initialize RSS mode for all Ports Implements t4_init_rss_mode() to initialize the rss_mode for all the ports. If Tunnel All Lookup isn't specified in the global RSS Configuration, then we need to specify a default Ingress Queue for any ingress packets which aren't hashed. We'll use our first ingress queue. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
a3bfb617 |
|
05-May-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Move SGE Ingress DMA state monitor code to a new routine Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
145ef8a5 |
|
05-May-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Enable congestion notification from SGE for IQs and FLs. Also changed the name of t4_hw.c:get_mps_bg_map() to t4_get_mps_bg_map() and make it an exported routine with a definition in cxgb4.h. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
7f0b8a56 |
|
29-Apr-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fix MC1 memory offset calculation Commit 6559a7e8296002b4 ("cxgb4: Cleanup macros so they follow the same style and look consistent") introduced a regression where reading MC1 memory in adapters where MC0 isn't present or MC0 size is not equal to MC1 size caused the adapter to crash due to incorrect computation of memoffset. Fix is to read the size of MC0 instead of MC1 for offset calculation Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
812034f1 |
|
06-Apr-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Move ethtool related code to a separate file Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ae469b68 |
|
01-Apr-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fix to dump devlog, even if FW is crashed Add new Common Code routines to retrieve Firmware Device Log parameters from PCIE_FW_PF[7]. The firmware initializes its Device Log very early on and stores the parameters for its location/size in that register. Using the parameters from the register allows us to access the Firmware Device Log even when the firmware crashes very early on or we're not attached to the firmware Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
e3d50738 |
|
10-Mar-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: fix coccinelle warnings Commit 16e47624e76b43db ("cxgb4: Add new scheme to update T4/T5 firmware") introduced below coccinelle warning. >> drivers/net/ethernet/chelsio/cxgb4/t4_hw.c:994:2-8: Replace memcpy with struct assignment Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
dbedd44e |
|
06-Mar-2015 |
Joe Perches <joe@perches.com> |
ethernet: codespell comment spelling fixes To test a checkpatch spelling patch, I ran codespell against drivers/net/ethernet/. $ git ls-files drivers/net/ethernet/ | \ while read file ; do \ codespell -w $file; \ done I removed a false positive in e1000_hw.h Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f01aa633 |
|
25-Feb-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fix PCI-E Memory window interface for big-endian systems When doing reads and writes to adapter memory via the PCI-E Memory Window interface, data gets swizzled on 4-byte boundaries on Big-Endian systems because we need to account for the register read/write interface which incorporates a swizzle onto the Little-Endian PCI-E Bus. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ba3f8cd5 |
|
08-Feb-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support in cxgb4 to get expansion rom version via ethtool Add support to get option/expansion rom version flashed in the adapter via ethtool getdrvinfo function. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
bad43792 |
|
06-Feb-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support in debugfs to dump the congestion control table Dump Transport Processor modules congestion control configuration Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
797ff0f5 |
|
06-Feb-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support for ULP RX logic analyzer output in debugfs Dump Upper Layer Protocol RX module command trace Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
2d277b3b |
|
06-Feb-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Added support in debugfs to display TP logic analyzer output Dump Transport Processor event trace. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b3bbe36a |
|
27-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Added support in debugfs to dump PM module stats Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c778af7d |
|
27-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Addded support in debugfs to dump CIM outbound queue content Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
e5f0e43b |
|
27-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Added support in debugfs to dump cim ingress bound queue contents Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
688ea5fe |
|
19-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add debugfs options to dump the rss key, config for PF, VF, etc Adds support to dump the rss table, rss_config, rss_key, rss_pf_config and rss_vf_config Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
49216c1c |
|
19-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add debugfs entry to dump the contents of the flash Adds support to dump the contents of the flash in the adapter Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
74b3092c |
|
06-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support for cim_qcfg entry in debugfs Adds debug log to get cim queue config Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f1ff24aa |
|
06-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support for cim_la entry in debugfs The CIM LA captures the embedded processor’s internal state. Optionally, it can also trace the flow of data in and out of the embedded processor. Therefore, the CIM LA output contains detailed information of what code the embedded processor executed prior to the CIM LA capture. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
0d804338 |
|
05-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf/csiostor: Cleanup PL, XGMAC, SF and MC related register defines This patch cleanups all PL, XGMAC and SF related macros/register defines that are defined in t4_regs.h and the affected files Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
837e4a42 |
|
05-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/csiostor: Cleanup TP, MPS and TCAM related register defines This patch cleanups all TP, MPS and TCAM related macros/register defines that are defined in t4_regs.h and the affected files Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
89c3a86c |
|
05-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxg4vf/csiostor: Cleanup MC, MA and CIM related register defines This patch cleanups all MC, MA and CIM related macros/register defines that are defined in t4_regs.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f061de42 |
|
05-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf/csiostor: Cleanup SGE and PCI related register defines This patch cleansup remaining SGE related macros/register defines and all PCI related ones that are defined in t4_regs.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
f612b815 |
|
05-Jan-2015 |
Hariprasad Shenai <hariprasad@chelsio.com> |
RDMA/cxgb4/cxgb4vf/csiostor: Cleanup SGE register defines This patch cleanups all SGE related macros/register defines that are defined in t4_regs.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
5aa80e51 |
|
17-Dec-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fix decoding QSA module for ethtool get settings QSA module was getting decoded as QSFP module in ethtool get settings, this patch fixes it. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
dd0bcc0b |
|
10-Dec-2014 |
Stephen Rothwell <sfr@canb.auug.org.au> |
cxgb4/cxgb4vf: global named must be unique Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
dff04bce |
|
03-Dec-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Update firmware version after flashing it via ethtool After successfully loading new firmware, reload the new firmware's version number information so "ethtool -i", etc. will report the right value Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
e85c9a7a |
|
03-Dec-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf: Add code to calculate T5 BAR2 Offsets for SGE Queue Registers Add new Common Code facilities for calculating T5 BAR2 Offsets for SGE Queue Registers. This new code can handle situations where Queues Per Page * SGE BAR2 Queue Register Area Size > Page Size Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
79af221d |
|
02-Dec-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add a check for flashing FW using ethtool Don't let T4 firmware flash on a T5 adapter and vice-versa using ethtool Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
b2e1a3f0 |
|
20-Nov-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
RDMA/cxgb4/cxgb4vf/csiostor: Cleanup macros/register defines related to PCIE, RSS and FW This patch cleanups all PCIE, RSS & FW related macros/register defines that are defined in t4fw_api.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
2b5fb1f2 |
|
20-Nov-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf/csiostor: Cleanup macros/register defines related to port and VI This patch cleanups all port and VI related macros/register defines that are defined in t4fw_api.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
6e4b51a6 |
|
20-Nov-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf/csiostor: Cleanup macros/register defines related to queues This patch cleanups all queue related macros/register defines that are defined in t4fw_api.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
5167865a |
|
20-Nov-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
RDMA/cxgb4/csiostor: Cleansup FW related macros/register defines for PF/VF and LDST This patch cleanups PF/VF and LDST related macros/register defines that are defined in t4fw_api.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
77a80e23 |
|
20-Nov-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
RDMA/cxgb4: Cleanup Filter related macros/register defines This patch cleanups all filter related macros/register defines that are defined in t4fw_api.h and the affected files. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
ce8f407a |
|
07-Nov-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4/cxgb4vf: For T5 use Packing and Padding Boundaries for SGE DMA transfers T5 introduces the ability to have separate Packing and Padding Boundaries for SGE DMA transfers from the chip to Host Memory. This change set takes advantage of that to set up a smaller Padding Boundary to conserve PCI Link and Memory Bandwidth with T5. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
e2ac9628 |
|
06-Nov-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Cleanup macros so they follow the same style and look consistent, part 2 Various patches have ended up changing the style of the symbolic macros/register defines to different style. As a result, the current kernel.org files are a mix of different macro styles. Since this macro/register defines is used by different drivers a few patch series have ended up adding duplicate macro/register define entries with different styles. This makes these register define/macro files a complete mess and we want to make them clean and consistent. This patch cleans up a part of it. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
6559a7e8 |
|
06-Nov-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Cleanup macros so they follow the same style and look consistent Various patches have ended up changing the style of the symbolic macros/register to different style. As a result, the current kernel.org files are a mix of different macro styles. Since this macro/register defines is used by different drivers a few patch series have ended up adding duplicate macro/register define entries with different styles. This makes these register define/macro files a complete mess and we want to make them clean and consistent. This patch cleans up a part of it. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
22c0b963 |
|
14-Oct-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fix FW flash logic using ethtool Use t4_fw_upgrade instead of t4_load_fw to write firmware into FLASH, since t4_load_fw doesn't co-ordinate with the firmware and the adapter can get hosed enough to require a power cycle of the system. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
8203b509 |
|
08-Oct-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Wait for device to get ready before reading any register Call t4_wait_dev_ready() before attempting to read the PL_WHOAMI register (to determine which function we have been attached to). This prevents us from failing on that read if it comes right after a RESET. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c290607e |
|
10-Sep-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add warning msg when attaching to adapters which have FLASHes smaller than 2Mb Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c0d5b8cf |
|
10-Sep-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fix t4_flash_erase_sectors() to throw an error when requested to erase sectors which aren't in the FLASH Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
fe2ee139 |
|
10-Sep-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add support to S25FL032P flash Add support for Spansion S25FL032P flash Based on original work by Dimitris Michailidis Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
31d55c2d |
|
01-Sep-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Detect and display firmware reported errors The adapter firmware can indicate error conditions to the host. If the firmware has indicated an error, print out the reason for the firmware error. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
9bb59b96 |
|
01-Sep-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fix T5 adapter accessing T4 adapter registers Fixes few register access for both T4 and T5. PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS & PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS is T4 only register don't let T5 access them. For T5 MA_PARITY_ERROR_STATUS2 is additionally read. MPS_TRC_RSS_CONTROL is T4 only register, for T5 use MPS_T5_TRC_RSS_CONTROL. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
63a92fe6 |
|
01-Sep-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fixed the code to use correct length for part number Previously it was using the length value of serial number. Also added macro for VPD unique identifier (0x82). Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
444018a7 |
|
01-Sep-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fix for handling 1Gb/s SFP+ Transceiver Modules We previously assumed that a Port's Capabilities and Advertised Capabilities would never change from Port Initialization time. This is no longer true when we can have 10Gb/s and 1Gb/s SFP+ Transceiver Modules randomly swapped. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
30f00847 |
|
05-Aug-2014 |
Anish Bhatt <anish@chelsio.com> |
cxgb4 : Disable recursive mailbox commands when enabling vi Enabling a Virtual Interface can result in an interrupt during the processing of the VI Enable command and, in some paths, result in an attempt to issue another command in the interrupt context, eventually crashing the system. Thus, we disable interrupts during the course of the VI Enable command and ensure enable doesn't sleep. Signed-off-by: Anish Bhatt <anish@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
c81576c2 |
|
24-Jul-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Fixed incorrect check for memory operation in t4_memory_rw Fix incorrect check introduced in commit fc5ab020 ("cxgb4: Replaced the backdoor mechanism to access the HW memory with PCIe Window method"). We where checking for write operation and doing a read, changed it accordingly. Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
822dd8a8 |
|
21-Jul-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add the MC1 registers to read in the interrupt handler Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
fc5ab020 |
|
27-Jun-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Replaced the backdoor mechanism to access the HW memory with PCIe Window method Rip out a bunch of redundant PCI-E Memory Window Read/Write routines, collapse the more general purpose routines into a single routine thereby eliminating the need for a large stack frame (and extra data copying) in the outer routine, change everything to use the improved routine t4_memory_rw. Based on origninal work by Casey Leedom <leedom@chelsio.com> and Steve Wise <swise@opengridcomputing.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
0abfd152 |
|
27-Jun-2014 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Use FW interface to get BAR0 value Use the firmware interface to get the BAR0 value since we really don't want to use the PCI-E Configuration Space Backdoor access which is owned by the firmware. Set up PCI-E Memory Window registers using the true values programmed into BAR registers. When the PF4 "Master Function" is exported to a Virtual Machine, the values returned by pci_resource_start() will be for the synthetic PCI-E Configuration Space and not the real addresses. But we need to program the PCI-E Memory Window address decoders with the real addresses that we're going to be using in order to have accesses through the Memory Windows work. Based on origninal work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Casey Leedom <leedom@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
|
#
40c9f8ab |
|
21-Jun-2014 |
Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com> |
cxgb4: use dev_port to identify ports Commit 3f85944fe207d0225ef21a2c0951d4946fc9a95d ("net: Add sysfs file for port number") introduce dev_port to network devices. cxgb4 adapters have multiple ports on the same PCI function, and used dev_id to identify those ports. That use was removed by commit 8c367fcbe6549195d2eb11e62bea233f811aad41 ("cxgb4: Do not set net_device::dev_id to VI index"), since dev_id should be used only when devices share the same MAC address. Using dev_port for cxgb4 allows different ports on the same PCI function to be identified. Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
ce100b8b |
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19-Jun-2014 |
Anish Bhatt <anish@chelsio.com> |
cxgb4 : Update copyright year on all cxgb4 files Signed-off-by: Anish Bhatt <anish@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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688848b1 |
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19-Jun-2014 |
Anish Bhatt <anish@chelsio.com> |
cxgb4 : Integrate DCBx support into cxgb4 module. Register dbcnl_ops to give access to DCBx functions Signed-off-by: Anish Bhatt <anish@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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6f1d7210 |
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15-Apr-2014 |
Steve Wise <larrystevenwise@gmail.com> |
cxgb4: use the correct max size for firmware flash The wrong max fw size was being used and causing false "too big" errors running ethtool -f. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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68bce192 |
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13-Mar-2014 |
Kumar Sanghvi <kumaras@chelsio.com> |
cxgb4: Add code to dump SGE registers when hitting idma hangs Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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e8b39015 |
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22-Feb-2014 |
Ben Hutchings <ben@decadent.org.uk> |
cgxb4: Stop using ethtool SPEED_* constants ethtool speed values are just numbers of megabits and there is no need to add SPEED_40000. To be consistent, use integer constants directly for all speeds. Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Signed-off-by: David S. Miller <davem@davemloft.net>
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a94cd705 |
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18-Feb-2014 |
Kumar Sanghvi <kumaras@chelsio.com> |
cxgb4: Print adapter VPD Part Number instead of Engineering Change field When we attach to adapter, print VPD Part Number instead of Engineering Change field. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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72aca4bf |
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18-Feb-2014 |
Kumar Sanghvi <kumaras@chelsio.com> |
cxgb4: Add support to recognize 40G links Also, create a new Common Code interface to translate Firmware Port Technology Type values (enum fw_port_type) to string descriptions. This will allow us to maintain the description translation table in one place rather than in every driver. Based on original work by Scott Bardone and Casey Leedom <leedom@chelsio.com> Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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a81ab36b |
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08-Jan-2014 |
Paul Gortmaker <paul.gortmaker@windriver.com> |
drivers/net: delete non-required instances of include <linux/init.h> None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. This covers everything under drivers/net except for wireless, which has been submitted separately. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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de5b8677 |
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18-Dec-2013 |
stephen hemminger <stephen@networkplumber.org> |
cxgb4: make functions static and remove dead code Cleanup by making local functions static. The code to load config file is unreachable in net-next, probably came from some out of tree driver. Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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dcf7b6f5 |
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18-Dec-2013 |
Kumar Sanghvi <kumaras@chelsio.com> |
cxgb4: Add API to correctly calculate tuple fields Adds API cxgb4_select_ntuple so as to enable Upper Level Drivers to correctly calculate the tuple fields. Adds constant definitions for TP_VLAN_PRI_MAP for the Compressed Filter Tuple field widths and structures and uses them. Also, the CPL Parameters field for T5 is 40 bits so we need to prototype cxgb4_select_ntuple() to calculate and return u64 values. Based on original work by Casey Leedom <leedom@chelsio.com> Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
16e47624 |
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03-Dec-2013 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Add new scheme to update T4/T5 firmware Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
d14807dd |
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03-Dec-2013 |
Hariprasad Shenai <hariprasad@chelsio.com> |
cxgb4: Much cleaner implementation of is_t4()/is_t5() Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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8c367fcb |
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10-Jun-2013 |
Ben Hutchings <bhutchings@solarflare.com> |
cxgb4: Do not set net_device::dev_id to VI index net_device::dev_id should not be used merely to indicate a VI index, as it affects the way the local part of IPv6 addresses is normally generated. This field was intended for use where multiple devices may share a single assigned MAC address and need to have different IPv6 addresses. T4 VIs each have their own MAC address. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Acked-by: Dimitris Michailidis <dm@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
e69972f5 |
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29-May-2013 |
Jay Hernandez <jay@chelsio.com> |
cxgb4: Force uninitialized state if FW_ON_ADAPTER is < FW_VERSION and we're the MASTER_PF Forcing uninitialized state allows us to upgrade and reinitialize the adapter. FW_VERSION_T4 = 1.4.0.0 FW_VERSION_T5 = 0.0.0.0 At this point driver supports above and greater than above version of firmware. If it doesn't find the required firmware version than it forces the adapter to be reinitialized as shown below. 1) If FW_ON_ADAPTER < FW_VERSION and we're the MASTER_PF force uninitialized state and a FW upgrade if available. - If FW_ON_ADAPTER < /lib/firmware/cxgb4/t*fw.bin we will update the adapters FW. - If FW_ON_ADAPTER >= /lib/firmware/cxgb4/t*fw.bin don't upgrade FW. - If upgrade_fw() fails force reinitialization of the adapter anyways, it might still work. Either way forcing the uninitialized state allows cxgb4 reinitialize FW. 2) If FW_ON_ADAPTER >= FW_VERSION driver follows normal path. Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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19dd37ba |
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13-Mar-2013 |
Santosh Rastapur <santosh@chelsio.com> |
cxgb4: Add T5 debugfs support Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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0a57a536 |
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13-Mar-2013 |
Santosh Rastapur <santosh@chelsio.com> |
cxgb4: Initialize T5 Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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47ce9c48 |
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07-Mar-2013 |
Santosh Rastapur <santosh@chelsio.com> |
cxgb4: Allow for backward compatibility with new VPD scheme. New scheme calls for 3rd party VPD at offset 0x0 and Chelsio VPD at offset 0x400 of the function. If no 3rd party VPD is present, then a copy of Chelsio's VPD will be at offset 0x0 to keep in line with PCI spec which requires the VPD to be present at offset 0x0. Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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aaeb6cdf |
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07-Jan-2013 |
Jiri Pirko <jiri@resnulli.us> |
remove init of dev->perm_addr in drivers perm_addr is initialized correctly in register_netdevice() so to init it in drivers is no longer needed. Signed-off-by: Jiri Pirko <jiri@resnulli.us> Signed-off-by: David S. Miller <davem@davemloft.net>
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f2b7e78d |
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10-Dec-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Add T4 filter support The T4 architecture is capable of filtering ingress packets at line rate using the rule in TCAM. If packet hits a rule in the TCAM then it can be either dropped or passed to the receive queues based on a rule settings. This patch adds framework for managing filters and to use T4's filter capabilities. It constructs a Firmware Filter Work Request which writes the filter at a specified index to get the work done. It hosts shadow copy of ingress filter entry to check field size limitations and save memory in the case where the filter table is large. Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
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1dd06ae8 |
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06-Dec-2012 |
Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
drivers/net: fix up function prototypes after __dev* removals The __dev* removal patches for the network drivers ended up messing up the function prototypes for a bunch of drivers. This patch fixes all of them back up to be properly aligned. Bonus is that this almost removes 100 lines of code, always a nice surprise. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
91744948 |
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03-Dec-2012 |
Bill Pemberton <wfp5p@virginia.edu> |
cxgb4: remove __dev* attributes CONFIG_HOTPLUG is going away as an option. As result the __dev* markings will be going away. Remove use of __devinit, __devexit_p, __devinitdata, __devinitconst, and __devexit. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Dimitris Michailidis <dm@chelsio.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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ce91a923 |
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15-Nov-2012 |
Naresh Kumar Inna <naresh@chelsio.com> |
[SCSI] cxgb4/cxgb4vf: Chelsio FCoE offload driver submission (common header updates). This patch contains updates to firmware/hardware header files shared between csiostor and cxgb4/cxgb4vf, and the resulting changes to the cxgb4/cxgb4vf source files. Signed-off-by: Naresh Kumar Inna <naresh@chelsio.com> Cc: David Miller <davem@davemloft.net> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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#
0dad9e94 |
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06-Nov-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Fix initialization of SGE_CONTROL register INGPADBOUNDARY_MASK is already shifted. No need to shift it again. On reloading a driver it was resulting in a bad SGE FL MTU sizes [1536, 9088] error. This only causes an issue on systems that have L1 cache size of 32B, 128B, 512B, 2048B or 4096B. Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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0062b15c |
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05-Nov-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Initialize data structures before using. We should not assume reserve fields to be don't cares as fields may change. Clearing data structures before using. Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
404d9e3f |
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07-Oct-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Address various sparse warnings This patch fixes type assignment issues, function definition and symbol shadowing which triggered sparse warnings. Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
594f88e9 |
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08-Oct-2012 |
Dan Carpenter <dan.carpenter@oracle.com> |
cxgb4: allocate enough data in t4_memory_rw() MEMWIN0_APERTURE is the size in bytes. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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8c357ebd |
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02-Oct-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Dynamically allocate memory in t4_memory_rw() and get_vpd_params() This patch changes memory allocation to reduce stack footprint Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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26f7cbc0 |
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25-Sep-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Don't attempt to upgrade T4 firmware when cxgb4 will end up as a slave This patch adds a new common code routine to upgrade an adapter's firmware. This routine handles all of the complexities of working with the the existing adapter firmware in order to quiesce the adapter and uP, etc. For an automatic upgrade it will send a HELLO command to check if cxgb4 want/can upgrade firmware, i.e. if cxgb4 is MASTER and has newer firmware that it wants to load and call the new common code routine t4_fw_upgrade. Note that it should not issue a RESET command after a successful firmware upgrade. Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
13ee15d3 |
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25-Sep-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Add support for T4 hardwired driver configuration settings In case if user defined configuration file at /lib/firmware/cxgb4/t4-config.txt location and also factory default configuration file written to FLASH are not present then driver will use hardwired configuration settings. Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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636f9d37 |
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25-Sep-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Add support for T4 configuration file Starting with T4 firmware version 1.3.11.0 the firmware now supports device configuration via a Firmware Configuration File. The Firmware Configuration File was primarily developed in order to centralize all of the configuration, resource allocation, etc. for Unified Wire operation where multiple Physical / Virtual Function Drivers would be using a T4 adapter simultaneously. The Firmware Configuration file can live in three locations as shown below in order of precedence. 1) User defined configuration file: /lib/firmware/cxgb4/t4-config.txt 2) Factory Default configuration file written to FLASH within the manufacturing process. 3) Hardwired driver configuration. Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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5afc8b84 |
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25-Sep-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Add functions to read memory via PCIE memory window This patch implements two new functions t4_mem_win_read and t4_memory_read. These new functions can be used to read memory via the PCIE memory window. Please note, for proper execution of these functions PCIE_MEM_ACCESS_BASE_WIN registers must be setup correctly like how setup_memwin in the cxgb4 driver does it. Signed-off-by: Jay Hernandez <jay@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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#
840f3000 |
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04-Sep-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Remove duplicate register definitions Removed duplicate definition for SGE_PF_KDOORBELL, SGE_INT_ENABLE3, PCIE_MEM_ACCESS_OFFSET registers. Moved the register field definitions around the register definition. Signed-off-by: Santosh Rastapur <santosh@chelsio.com> Signed-off-by: Vipul Pandya <vipul@chelsio.com> Reviewed-by: Sivakumar Subramani <sivasu@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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e5c8ae5f |
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20-Aug-2012 |
Jiang Liu <jiang.liu@huawei.com> |
cxgb4: Use PCI Express Capability accessors Use PCI Express Capability access functions to simplify cxgb4 driver. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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49ce9c2c |
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10-Jul-2012 |
Ben Hutchings <bhutchings@solarflare.com> |
drivers/net/ethernet: Fix (nearly-)kernel-doc comments for various functions Fix incorrect start markers, wrapped summary lines, missing section breaks, incorrect separators, and some name mismatches. Delete a few that are content-free. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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8caa1e84 |
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18-May-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Common platform specific changes for DB Drop Recovery Add platform-specific callback functions for interrupts. This is needed to do a single read-clear of the CAUSE register and then call out to platform specific functions for DB threshold interrupts and DB drop interrupts. Add t4_mem_win_read_len() - mem-window reads for arbitrary lengths. This is used to read the CIDX/PIDX values from EC contexts during DB drop recovery. Add t4_fwaddrspace_write() - sends addrspace write cmds to the fw. Needed to flush the sge eq context cache. Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
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881806bc |
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18-May-2012 |
Vipul Pandya <vipul@chelsio.com> |
cxgb4: Detect DB FULL events and notify RDMA ULD Signed-off-by: Vipul Pandya <vipul@chelsio.com> Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
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f7917c00 |
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07-Apr-2011 |
Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
chelsio: Move the Chelsio drivers Moves the drivers for the Chelsio chipsets into drivers/net/ethernet/chelsio/ and the necessary Kconfig and Makefile changes. CC: Divy Le Ray <divy@chelsio.com> CC: Dimitris Michailidis <dm@chelsio.com> CC: Casey Leedom <leedom@chelsio.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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