Searched refs:clksrc (Results 1 - 25 of 29) sorted by relevance

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/linux-master/drivers/clocksource/
H A Dmmio.c12 struct clocksource clksrc; member in struct:clocksource_mmio
17 return container_of(c, struct clocksource_mmio, clksrc);
63 cs->clksrc.name = name;
64 cs->clksrc.rating = rating;
65 cs->clksrc.read = read;
66 cs->clksrc.mask = CLOCKSOURCE_MASK(bits);
67 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
69 return clocksource_register_hz(&cs->clksrc, hz);
H A Dtimer-atmel-pit.c40 struct clocksource clksrc; member in struct:pit_data
49 static inline struct pit_data *clksrc_to_pit_data(struct clocksource *clksrc) argument
51 return container_of(clksrc, struct pit_data, clksrc);
221 data->clksrc.mask = CLOCKSOURCE_MASK(bits);
222 data->clksrc.name = "pit";
223 data->clksrc.rating = 175;
224 data->clksrc.read = read_pit_clk;
225 data->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
227 ret = clocksource_register_hz(&data->clksrc, pit_rat
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H A Dtimer-sun5i.c41 struct clocksource clksrc; member in struct:sun5i_timer
48 container_of(x, struct sun5i_timer, clksrc)
141 static u64 sun5i_clksrc_read(struct clocksource *clksrc) argument
143 struct sun5i_timer *cs = clksrc_to_sun5i_timer(clksrc);
156 clocksource_unregister(&cs->clksrc);
160 clocksource_register_hz(&cs->clksrc, ndata->new_rate);
183 cs->clksrc.name = pdev->dev.of_node->name;
184 cs->clksrc.rating = 340;
185 cs->clksrc.read = sun5i_clksrc_read;
186 cs->clksrc
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H A Dtimer-loongson1-pwm.c36 struct clocksource clksrc; member in struct:ls1x_clocksource
41 return container_of(c, struct ls1x_clocksource, clksrc);
207 .clksrc = {
231 return clocksource_register_hz(&ls1x_clocksource.clksrc,
H A Dtimer-ti-dm-systimer.c714 struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs); local
715 struct dmtimer_systimer *t = &clksrc->t;
729 struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs); local
730 struct dmtimer_systimer *t = &clksrc->t;
732 clksrc->loadval = readl_relaxed(t->base + t->counter);
739 struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs); local
740 struct dmtimer_systimer *t = &clksrc->t;
748 writel_relaxed(clksrc->loadval, t->base + t->counter);
755 struct dmtimer_clocksource *clksrc; local
760 clksrc
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H A Dtimer-microchip-pit64b.c81 * @clksrc: clocksource
85 struct clocksource clksrc; member in struct:mchp_pit64b_clksrc
90 struct mchp_pit64b_clksrc, clksrc))
366 cs->clksrc.name = MCHP_PIT64B_NAME;
367 cs->clksrc.mask = CLOCKSOURCE_MASK(64);
368 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
369 cs->clksrc.rating = 210;
370 cs->clksrc.read = mchp_pit64b_clksrc_read;
371 cs->clksrc.suspend = mchp_pit64b_clksrc_suspend;
372 cs->clksrc
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H A Dtimer-atmel-tcb.c113 static struct clocksource clksrc = { variable in typeref:struct:clocksource
124 return tc_get_cycles(&clksrc);
129 return tc_get_cycles32(&clksrc);
136 return tc_get_cycles(&clksrc);
141 return tc_get_cycles32(&clksrc);
451 clksrc.name = kbasename(node->parent->full_name);
453 pr_debug("%s at %d.%03d MHz\n", clksrc.name, divided_rate / 1000000,
460 clksrc.read = tc_get_cycles32;
481 ret = clocksource_register_hz(&clksrc, divided_rate);
498 clocksource_unregister(&clksrc);
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H A DMakefile28 obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o
/linux-master/include/linux/
H A Dsm501.h13 int clksrc, unsigned long freq);
16 int clksrc, unsigned long req_freq);
/linux-master/drivers/net/dsa/sja1105/
H A Dsja1105_clocking.c44 u64 clksrc; member in struct:sja1105_cgu_idiv
67 u64 clksrc; member in struct:sja1110_cgu_outclk
97 u64 clksrc; member in struct:sja1105_cgu_mii_ctrl
107 sja1105_packing(buf, &idiv->clksrc, 28, 24, size, op);
130 idiv.clksrc = 0x0A; /* 25MHz */
146 sja1105_packing(buf, &cmd->clksrc, 28, 24, size, op);
171 int clksrc; local
177 clksrc = mac_clk_sources[port];
179 clksrc = phy_clk_sources[port];
182 mii_tx_clk.clksrc
344 int clksrc; local
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/linux-master/arch/m68k/atari/
H A Ddebug.c219 int clksrc, clkmode, div, reg3, reg5; local
227 clksrc = clksrc_table[baud];
232 clksrc = 0x28; /* TRxC */
252 SCC_WRITE(11, clksrc); /* main clock source */
/linux-master/drivers/spi/
H A Dspi-rspi.c255 unsigned long clksrc; local
258 clksrc = clk_get_rate(rspi->clk);
259 spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz) - 1;
267 rspi->speed_hz = DIV_ROUND_UP(clksrc, (2U << brdv) * (spbr + 1));
340 unsigned long clksrc; local
347 clksrc = clk_get_rate(rspi->clk);
348 if (rspi->speed_hz >= clksrc) {
350 rspi->speed_hz = clksrc;
352 spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz);
358 rspi->speed_hz = DIV_ROUND_UP(clksrc, (
1289 unsigned long clksrc; local
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H A Dspi-sh-msiof.c1279 unsigned long clksrc; local
1358 clksrc = clk_get_rate(p->clk);
1359 ctlr->min_speed_hz = DIV_ROUND_UP(clksrc, 1024);
1360 ctlr->max_speed_hz = DIV_ROUND_UP(clksrc, 1 << p->min_div_pow);
/linux-master/drivers/gpu/drm/renesas/shmobile/
H A Dshmob_drm_drv.c39 enum shmob_drm_clk_source clksrc)
44 switch (clksrc) {
38 shmob_drm_setup_clocks(struct shmob_drm_device *sdev, enum shmob_drm_clk_source clksrc) argument
/linux-master/drivers/memory/tegra/
H A Dtegra210-emc-core.c720 static void tegra210_emc_set_clock(struct tegra210_emc *emc, u32 clksrc) argument
722 emc->sequence->set_clock(emc, clksrc);
731 u32 clksrc)
737 emc_clk_src = (clksrc & EMC_CLK_EMC_2X_CLK_SRC_MASK) >>
739 emc_clk_div = (clksrc & EMC_CLK_EMC_2X_CLK_DIVISOR_MASK) >>
792 u32 clksrc; local
794 clksrc = emc->provider.configs[index].value |
800 tegra210_emc_set_clock(emc, clksrc);
839 void tegra210_emc_do_clock_change(struct tegra210_emc *emc, u32 clksrc) argument
846 tegra210_clk_emc_update_setting(clksrc);
730 tegra210_change_dll_src(struct tegra210_emc *emc, u32 clksrc) argument
1139 tegra210_emc_dll_prelock(struct tegra210_emc *emc, u32 clksrc) argument
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H A Dtegra210-emc.h939 void (*set_clock)(struct tegra210_emc *emc, u32 clksrc);
994 void tegra210_emc_do_clock_change(struct tegra210_emc *emc, u32 clksrc);
1008 u32 tegra210_emc_dll_prelock(struct tegra210_emc *emc, u32 clksrc);
/linux-master/sound/soc/fsl/
H A Dfsl_esai.c263 struct clk *clksrc = esai_priv->extalclk; local
293 clksrc = esai_priv->fsysclk;
305 if (IS_ERR(clksrc)) {
308 return PTR_ERR(clksrc);
310 clk_rate = clk_get_rate(clksrc);
328 if (ratio == 1 && clksrc == esai_priv->extalclk) {
H A Dfsl_spdif.c486 u8 clksrc = spdif_priv->rxclk_src; local
488 if (clksrc >= SRPC_CLKSRC_MAX || gainsel >= GAINSEL_MULTI_MAX)
493 SRPC_CLKSRC_SEL_SET(clksrc) | SRPC_GAINSEL_SET(gainsel));
1068 u8 clksrc; local
1073 clksrc = (phaseconf >> SRPC_CLKSRC_SEL_OFFSET) & 0xf;
1076 if (srpc_dpll_locked[clksrc] && (phaseconf & SRPC_DPLL_LOCKED))
/linux-master/sound/soc/codecs/
H A Dcs35l36.c52 int clksrc; member in struct:cs35l36_private
1011 prev_clksrc = cs35l36->clksrc;
1015 cs35l36->clksrc = CS35L36_PLLSRC_SCLK;
1018 cs35l36->clksrc = CS35L36_PLLSRC_LRCLK;
1021 cs35l36->clksrc = CS35L36_PLLSRC_PDMCLK;
1024 cs35l36->clksrc = CS35L36_PLLSRC_SELF;
1027 cs35l36->clksrc = CS35L36_PLLSRC_MCLK;
1050 cs35l36->clksrc);
1081 if (cs35l36->clksrc == CS35L36_PLLSRC_PDMCLK) {
H A Dcs35l41.c835 int extclk_cfg, clksrc; local
839 clksrc = CS35L41_PLLSRC_SCLK;
842 clksrc = CS35L41_PLLSRC_LRCLK;
845 clksrc = CS35L41_PLLSRC_MCLK;
870 CS35L41_PLL_CLK_SEL_MASK, clksrc);
H A Dcs35l35.c713 int clksrc; local
718 clksrc = CS35L35_CLK_SOURCE_MCLK;
721 clksrc = CS35L35_CLK_SOURCE_SCLK;
724 clksrc = CS35L35_CLK_SOURCE_PDM;
751 clksrc << CS35L35_CLK_SOURCE_SHIFT);
/linux-master/drivers/mmc/host/
H A Dsdhci-s3c.c182 struct clk *clksrc = ourhost->clk_bus[src]; local
185 if (IS_ERR(clksrc))
193 rate = clk_round_rate(clksrc, wanted);
/linux-master/drivers/mfd/
H A Dsm501.c509 int clksrc,
526 switch (clksrc) {
590 clock = clock & ~(0xFF << clksrc);
591 clock |= reg<<clksrc;
640 int clksrc,
647 switch (clksrc) {
508 sm501_set_clock(struct device *dev, int clksrc, unsigned long req_freq) argument
639 sm501_find_clock(struct device *dev, int clksrc, unsigned long req_freq) argument
/linux-master/drivers/tty/serial/
H A Dmax310x.c564 unsigned int div, clksrc, pllcfg = 0; local
606 clksrc = MAX310X_CLKSRC_EXTCLK_BIT | (xtal ? MAX310X_CLKSRC_CRYST_BIT : 0);
610 clksrc |= MAX310X_CLKSRC_PLL_BIT;
613 clksrc |= MAX310X_CLKSRC_PLLBYP_BIT;
615 regmap_write(s->regmap, MAX310X_CLKSRC_REG, clksrc);
/linux-master/drivers/clk/renesas/
H A Drzg2l-cpg.c124 u8 clksrc; member in struct:rzg2l_pll5_mux_dsi_div_param
603 if (priv->mux_dsi_div_params.clksrc)
708 parent = clk_hw_get_parent_by_index(hw, priv->mux_dsi_div_params.clksrc);
801 if (priv->mux_dsi_div_params.clksrc)
942 priv->mux_dsi_div_params.clksrc = 1; /* Use clk src 1 for DSI */

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