Searched refs:SCLK_SPDIF (Results 1 - 24 of 24) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Drk3036-cru.h27 #define SCLK_SPDIF 83 macro
H A Dexynos7-clk.h119 #define SCLK_SPDIF 27 macro
H A Ds5pv210.h187 #define SCLK_SPDIF 165 macro
H A Drk3188-cru-common.h34 #define SCLK_SPDIF 78 macro
H A Drk3128-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3228-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3288-cru.h38 #define SCLK_SPDIF 83 macro
H A Drk3328-cru.h35 #define SCLK_SPDIF 46 macro
/linux-master/include/dt-bindings/clock/
H A Drk3036-cru.h27 #define SCLK_SPDIF 83 macro
H A Dexynos7-clk.h119 #define SCLK_SPDIF 27 macro
H A Ds5pv210.h187 #define SCLK_SPDIF 165 macro
H A Drk3188-cru-common.h34 #define SCLK_SPDIF 78 macro
H A Drk3128-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3228-cru.h30 #define SCLK_SPDIF 83 macro
H A Drk3288-cru.h38 #define SCLK_SPDIF 83 macro
H A Drk3328-cru.h35 #define SCLK_SPDIF 46 macro
/linux-master/drivers/clk/rockchip/
H A Dclk-rk3036.c166 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, 0,
H A Dclk-rk3228.c196 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3128.c182 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3188.c256 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
H A Dclk-rk3288.c382 GATE(SCLK_SPDIF, "sclk_spdif", "spdif_mux", CLK_SET_RATE_PARENT,
H A Dclk-rk3328.c249 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, CLK_SET_RATE_PARENT,
/linux-master/drivers/clk/samsung/
H A Dclk-s5pv210.c669 GATE(SCLK_SPDIF, "sclk_spdif", "mout_spdif", CLK_SRC_MASK0, 27,
H A Dclk-exynos7.c798 GATE(SCLK_SPDIF, "sclk_spdif_user", "sclk_spdif",

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