treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

Based on 3 normalized pattern(s):

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version this program is distributed in the
hope that it will be useful but without any warranty without even
the implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [kishon] [vijay] [abraham]
[i] [kishon]@[ti] [com] this program is distributed in the hope that
it will be useful but without any warranty without even the implied
warranty of merchantability or fitness for a particular purpose see
the gnu general public license for more details

this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license as published by
the free software foundation either version 2 of the license or at
your option any later version [author] [graeme] [gregory]
[gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i]
[kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema]
[hk] [hemahk]@[ti] [com] this program is distributed in the hope
that it will be useful but without any warranty without even the
implied warranty of merchantability or fitness for a particular
purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1105 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

clk: rockchip: add rk3288 vip_out clock id

Add clock-ids for the vip block of the rk3288

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: add rk3288 isp_in clock ids

Add clock-ids for the isp block of the rk3288.

Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: Add the clock ids of rk3288 eFuses

Add clock-ids for the two efuse blocks of the rk3288.

Signed-off-by: ZhengShunQian <zhengsq@rock-chips.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: add id for mipidsi sclk on rk3288

Adds a new id for the sclk supplying the mipidsi on rk3288 socs.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: add an id for rk3288 crypto clk

Add an id for crypto clk to the binding header, so that it can be called
in other part.

Signed-off-by: Zain Wang <zain.wang@rock-chips.com>
Acked-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: add missing include guards

Review for the rk3368 turned up that the clock header was missing include
guards. This is also true for the already existing clock binding headers,
so add them.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

clk: rockchip: add id for watchdog pclk on rk3288

Adds a new id for the pclk supplying the watchdog on rk3288 socs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>

clk: rockchip: add clock IDs for the PVTM clocks

Process-Voltage-Temperature Monitor has two clocks, PVTM_CORE and
PVTM_GPU.

Signed-off-by: Huang Lin <hl@rock-chips.com>
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: add clock ID for usbphy480m_src

There are 3 different parent clock from different usbphy,
all of them are fixed 480MHz, it is not able to auto select
by clock core to the 2nd and the 3rd parent.
For different use case for different board, we may need to
select different usbphy clock out as parent manually.

Add the clock ID for it so that we can use in dts.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

GMAC: define clock ID used for GMAC

changes since v2:
1. remove SCLK_MAC_PLL

Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

clk: rockchip: add bindings for the mmc clocks

These clocks represent the physical clocks (including phases) and they will
later be used for clock phase tuning.

Suggested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: rk3288 export i2s0_clkout for use in DT

This exposes the clock that comes out of the i2s block which generally
goes to the audio codec.

Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
[removed CLK_SET_RATE_PARENT from original patch]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: add binding ID for DMC (memory controller) clocks on rk3288

The DMC clocks need to be turned off at runtime, so we should have IDs
so we can export them.

Signed-off-by: Jeff Chen <cym@rock-chips.com>
[dianders: split into two patches; adjusted commit msg]
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

clk: rockchip: add binding id for ARMCLK

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>

clk: rockchip: add some needed clock binding id for rk3288

This patch add some clock binding id for different modules
that under development and going to send upstream.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

clk: rockchip: rk3288: add reset indices for SOFTRST9-11

The patch add the rest of the indices of the additional reset
registers from the updated TRM.

Signed-off-by: Mark yao <mark.yao@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

clk: rockchip: add clock controller for rk3288

Add the clock tree definition for the new rk3288 SoC.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>