Searched refs:CLK_TOP_UNIVPLL2_D2 (Results 1 - 25 of 30) sorted by relevance

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/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt8135-clk.h48 #define CLK_TOP_UNIVPLL2_D2 37 macro
H A Dmt7629-clk.h54 #define CLK_TOP_UNIVPLL2_D2 44 macro
H A Dmt7622-clk.h48 #define CLK_TOP_UNIVPLL2_D2 36 macro
H A Dmt6797-clk.h72 #define CLK_TOP_UNIVPLL2_D2 62 macro
H A Dmt6765-clk.h61 #define CLK_TOP_UNIVPLL2_D2 26 macro
H A Dmt8173-clk.h77 #define CLK_TOP_UNIVPLL2_D2 67 macro
H A Dmediatek,mt6795-clk.h75 #define CLK_TOP_UNIVPLL2_D2 64 macro
H A Dmt2701-clk.h39 #define CLK_TOP_UNIVPLL2_D2 29 macro
H A Dmt2712-clk.h61 #define CLK_TOP_UNIVPLL2_D2 30 macro
H A Dmediatek,mt8365-clk.h36 #define CLK_TOP_UNIVPLL2_D2 26 macro
/linux-master/include/dt-bindings/clock/
H A Dmt8135-clk.h48 #define CLK_TOP_UNIVPLL2_D2 37 macro
H A Dmt7629-clk.h54 #define CLK_TOP_UNIVPLL2_D2 44 macro
H A Dmt7622-clk.h48 #define CLK_TOP_UNIVPLL2_D2 36 macro
H A Dmt6797-clk.h72 #define CLK_TOP_UNIVPLL2_D2 62 macro
H A Dmt6765-clk.h61 #define CLK_TOP_UNIVPLL2_D2 26 macro
H A Dmt8173-clk.h77 #define CLK_TOP_UNIVPLL2_D2 67 macro
H A Dmediatek,mt6795-clk.h75 #define CLK_TOP_UNIVPLL2_D2 64 macro
H A Dmt2701-clk.h39 #define CLK_TOP_UNIVPLL2_D2 29 macro
H A Dmt2712-clk.h61 #define CLK_TOP_UNIVPLL2_D2 30 macro
H A Dmediatek,mt8365-clk.h36 #define CLK_TOP_UNIVPLL2_D2 26 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c431 FACTOR_FLAGS(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", "univ_416m", 1, 2, 0),
H A Dclk-mt8173-topckgen.c510 FACTOR_FLAGS(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", "univ_416m", 1, 2, 0),
H A Dclk-mt8135.c69 FACTOR(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", "univpll_416m", 1, 2),
H A Dclk-mt7622.c290 FACTOR(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", "univpll", 1, 6),
H A Dclk-mt7629.c397 FACTOR(CLK_TOP_UNIVPLL2_D2, "univpll2_d2", "univpll", 1, 6),

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