1238104Sdes/* SPDX-License-Identifier: GPL-2.0 */ 2238104Sdes 3238104Sdes#ifndef _DT_BINDINGS_CLK_MT6765_H 4238104Sdes#define _DT_BINDINGS_CLK_MT6765_H 5238104Sdes 6238104Sdes/* FIX Clks */ 7238104Sdes#define CLK_TOP_CLK26M 0 8238104Sdes 9238104Sdes/* APMIXEDSYS */ 10238104Sdes#define CLK_APMIXED_ARMPLL_L 0 11238104Sdes#define CLK_APMIXED_ARMPLL 1 12238104Sdes#define CLK_APMIXED_CCIPLL 2 13238104Sdes#define CLK_APMIXED_MAINPLL 3 14238104Sdes#define CLK_APMIXED_MFGPLL 4 15238104Sdes#define CLK_APMIXED_MMPLL 5 16238104Sdes#define CLK_APMIXED_UNIV2PLL 6 17238104Sdes#define CLK_APMIXED_MSDCPLL 7 18238104Sdes#define CLK_APMIXED_APLL1 8 19238104Sdes#define CLK_APMIXED_MPLL 9 20238104Sdes#define CLK_APMIXED_ULPOSC1 10 21238104Sdes#define CLK_APMIXED_ULPOSC2 11 22238104Sdes#define CLK_APMIXED_SSUSB26M 12 23238104Sdes#define CLK_APMIXED_APPLL26M 13 24238104Sdes#define CLK_APMIXED_MIPIC0_26M 14 25238104Sdes#define CLK_APMIXED_MDPLLGP26M 15 26238104Sdes#define CLK_APMIXED_MMSYS_F26M 16 27238104Sdes#define CLK_APMIXED_UFS26M 17 28238104Sdes#define CLK_APMIXED_MIPIC1_26M 18 29238104Sdes#define CLK_APMIXED_MEMPLL26M 19 30238104Sdes#define CLK_APMIXED_CLKSQ_LVPLL_26M 20 31238104Sdes#define CLK_APMIXED_MIPID0_26M 21 32238104Sdes#define CLK_APMIXED_NR_CLK 22 33238104Sdes 34238104Sdes/* TOPCKGEN */ 35238104Sdes#define CLK_TOP_SYSPLL 0 36238104Sdes#define CLK_TOP_SYSPLL_D2 1 37238104Sdes#define CLK_TOP_SYSPLL1_D2 2 38238104Sdes#define CLK_TOP_SYSPLL1_D4 3 39238104Sdes#define CLK_TOP_SYSPLL1_D8 4 40238104Sdes#define CLK_TOP_SYSPLL1_D16 5 41238104Sdes#define CLK_TOP_SYSPLL_D3 6 42238104Sdes#define CLK_TOP_SYSPLL2_D2 7 43238104Sdes#define CLK_TOP_SYSPLL2_D4 8 44238104Sdes#define CLK_TOP_SYSPLL2_D8 9 45238104Sdes#define CLK_TOP_SYSPLL_D5 10 46238104Sdes#define CLK_TOP_SYSPLL3_D2 11 47238104Sdes#define CLK_TOP_SYSPLL3_D4 12 48238104Sdes#define CLK_TOP_SYSPLL_D7 13 49238104Sdes#define CLK_TOP_SYSPLL4_D2 14 50238104Sdes#define CLK_TOP_SYSPLL4_D4 15 51238104Sdes#define CLK_TOP_USB20_192M 16 52238104Sdes#define CLK_TOP_USB20_192M_D4 17 53238104Sdes#define CLK_TOP_USB20_192M_D8 18 54238104Sdes#define CLK_TOP_USB20_192M_D16 19 55238104Sdes#define CLK_TOP_USB20_192M_D32 20 56238104Sdes#define CLK_TOP_UNIVPLL 21 57238104Sdes#define CLK_TOP_UNIVPLL_D2 22 58238104Sdes#define CLK_TOP_UNIVPLL1_D2 23 59238104Sdes#define CLK_TOP_UNIVPLL1_D4 24 60238104Sdes#define CLK_TOP_UNIVPLL_D3 25 61238104Sdes#define CLK_TOP_UNIVPLL2_D2 26 62238104Sdes#define CLK_TOP_UNIVPLL2_D4 27 63238104Sdes#define CLK_TOP_UNIVPLL2_D8 28 64238104Sdes#define CLK_TOP_UNIVPLL2_D32 29 65238104Sdes#define CLK_TOP_UNIVPLL_D5 30 66238104Sdes#define CLK_TOP_UNIVPLL3_D2 31 67238104Sdes#define CLK_TOP_UNIVPLL3_D4 32 68238104Sdes#define CLK_TOP_MMPLL 33 69238104Sdes#define CLK_TOP_MMPLL_D2 34 70238104Sdes#define CLK_TOP_MPLL 35 71238104Sdes#define CLK_TOP_DA_MPLL_104M_DIV 36 72238104Sdes#define CLK_TOP_DA_MPLL_52M_DIV 37 73238104Sdes#define CLK_TOP_MFGPLL 38 74238104Sdes#define CLK_TOP_MSDCPLL 39 75238104Sdes#define CLK_TOP_MSDCPLL_D2 40 76238104Sdes#define CLK_TOP_APLL1 41 77238104Sdes#define CLK_TOP_APLL1_D2 42 78238104Sdes#define CLK_TOP_APLL1_D4 43 79238104Sdes#define CLK_TOP_APLL1_D8 44 80238104Sdes#define CLK_TOP_ULPOSC1 45 81238104Sdes#define CLK_TOP_ULPOSC1_D2 46 82238104Sdes#define CLK_TOP_ULPOSC1_D4 47 83238104Sdes#define CLK_TOP_ULPOSC1_D8 48 84238104Sdes#define CLK_TOP_ULPOSC1_D16 49 85238104Sdes#define CLK_TOP_ULPOSC1_D32 50 86238104Sdes#define CLK_TOP_DMPLL 51 87238104Sdes#define CLK_TOP_F_FRTC 52 88238104Sdes#define CLK_TOP_F_F26M 53 89238104Sdes#define CLK_TOP_AXI 54 90238104Sdes#define CLK_TOP_MM 55 91238104Sdes#define CLK_TOP_SCP 56 92238104Sdes#define CLK_TOP_MFG 57 93238104Sdes#define CLK_TOP_F_FUART 58 94238104Sdes#define CLK_TOP_SPI 59 95238104Sdes#define CLK_TOP_MSDC50_0 60 96238104Sdes#define CLK_TOP_MSDC30_1 61 97238104Sdes#define CLK_TOP_AUDIO 62 98238104Sdes#define CLK_TOP_AUD_1 63 99238104Sdes#define CLK_TOP_AUD_ENGEN1 64 100238104Sdes#define CLK_TOP_F_FDISP_PWM 65 101238104Sdes#define CLK_TOP_SSPM 66 102238104Sdes#define CLK_TOP_DXCC 67 103238104Sdes#define CLK_TOP_I2C 68 104238104Sdes#define CLK_TOP_F_FPWM 69 105238104Sdes#define CLK_TOP_F_FSENINF 70 106238104Sdes#define CLK_TOP_AES_FDE 71 107238104Sdes#define CLK_TOP_F_BIST2FPC 72 108238104Sdes#define CLK_TOP_ARMPLL_DIVIDER_PLL0 73 109238104Sdes#define CLK_TOP_ARMPLL_DIVIDER_PLL1 74 110238104Sdes#define CLK_TOP_ARMPLL_DIVIDER_PLL2 75 111238104Sdes#define CLK_TOP_DA_USB20_48M_DIV 76 112238104Sdes#define CLK_TOP_DA_UNIV_48M_DIV 77 113238104Sdes#define CLK_TOP_APLL12_DIV0 78 114238104Sdes#define CLK_TOP_APLL12_DIV1 79 115238104Sdes#define CLK_TOP_APLL12_DIV2 80 116238104Sdes#define CLK_TOP_APLL12_DIV3 81 117238104Sdes#define CLK_TOP_ARMPLL_DIVIDER_PLL0_EN 82 118238104Sdes#define CLK_TOP_ARMPLL_DIVIDER_PLL1_EN 83 119238104Sdes#define CLK_TOP_ARMPLL_DIVIDER_PLL2_EN 84 120238104Sdes#define CLK_TOP_FMEM_OCC_DRC_EN 85 121238104Sdes#define CLK_TOP_USB20_48M_EN 86 122238104Sdes#define CLK_TOP_UNIVPLL_48M_EN 87 123238104Sdes#define CLK_TOP_MPLL_104M_EN 88 124238104Sdes#define CLK_TOP_MPLL_52M_EN 89 125238104Sdes#define CLK_TOP_F_UFS_MP_SAP_CFG_EN 90 126238104Sdes#define CLK_TOP_F_BIST2FPC_EN 91 127238104Sdes#define CLK_TOP_MD_32K 92 128238104Sdes#define CLK_TOP_MD_26M 93 129238104Sdes#define CLK_TOP_MD2_32K 94 130238104Sdes#define CLK_TOP_MD2_26M 95 131238104Sdes#define CLK_TOP_AXI_SEL 96 132238104Sdes#define CLK_TOP_MEM_SEL 97 133238104Sdes#define CLK_TOP_MM_SEL 98 134238104Sdes#define CLK_TOP_SCP_SEL 99 135238104Sdes#define CLK_TOP_MFG_SEL 100 136238104Sdes#define CLK_TOP_ATB_SEL 101 137238104Sdes#define CLK_TOP_CAMTG_SEL 102 138238104Sdes#define CLK_TOP_CAMTG1_SEL 103 139238104Sdes#define CLK_TOP_CAMTG2_SEL 104 140238104Sdes#define CLK_TOP_CAMTG3_SEL 105 141238104Sdes#define CLK_TOP_UART_SEL 106 142238104Sdes#define CLK_TOP_SPI_SEL 107 143238104Sdes#define CLK_TOP_MSDC50_0_HCLK_SEL 108 144238104Sdes#define CLK_TOP_MSDC50_0_SEL 109 145238104Sdes#define CLK_TOP_MSDC30_1_SEL 110 146238104Sdes#define CLK_TOP_AUDIO_SEL 111 147238104Sdes#define CLK_TOP_AUD_INTBUS_SEL 112 148238104Sdes#define CLK_TOP_AUD_1_SEL 113 149238104Sdes#define CLK_TOP_AUD_ENGEN1_SEL 114 150238104Sdes#define CLK_TOP_DISP_PWM_SEL 115 151238104Sdes#define CLK_TOP_SSPM_SEL 116 152238104Sdes#define CLK_TOP_DXCC_SEL 117 153238104Sdes#define CLK_TOP_USB_TOP_SEL 118 154238104Sdes#define CLK_TOP_SPM_SEL 119 155238104Sdes#define CLK_TOP_I2C_SEL 120 156238104Sdes#define CLK_TOP_PWM_SEL 121 157238104Sdes#define CLK_TOP_SENINF_SEL 122 158238104Sdes#define CLK_TOP_AES_FDE_SEL 123 159238104Sdes#define CLK_TOP_PWRAP_ULPOSC_SEL 124 160238104Sdes#define CLK_TOP_CAMTM_SEL 125 161238104Sdes#define CLK_TOP_NR_CLK 126 162238104Sdes 163238104Sdes/* INFRACFG */ 164238104Sdes#define CLK_IFR_ICUSB 0 165238104Sdes#define CLK_IFR_GCE 1 166238104Sdes#define CLK_IFR_THERM 2 167238104Sdes#define CLK_IFR_I2C_AP 3 168238104Sdes#define CLK_IFR_I2C_CCU 4 169238104Sdes#define CLK_IFR_I2C_SSPM 5 170238104Sdes#define CLK_IFR_I2C_RSV 6 171238104Sdes#define CLK_IFR_PWM_HCLK 7 172238104Sdes#define CLK_IFR_PWM1 8 173238104Sdes#define CLK_IFR_PWM2 9 174238104Sdes#define CLK_IFR_PWM3 10 175238104Sdes#define CLK_IFR_PWM4 11 176238104Sdes#define CLK_IFR_PWM5 12 177238104Sdes#define CLK_IFR_PWM 13 178238104Sdes#define CLK_IFR_UART0 14 179238104Sdes#define CLK_IFR_UART1 15 180238104Sdes#define CLK_IFR_GCE_26M 16 181238104Sdes#define CLK_IFR_CQ_DMA_FPC 17 182238104Sdes#define CLK_IFR_BTIF 18 183238104Sdes#define CLK_IFR_SPI0 19 184238104Sdes#define CLK_IFR_MSDC0 20 185238104Sdes#define CLK_IFR_MSDC1 21 186238104Sdes#define CLK_IFR_TRNG 22 187238104Sdes#define CLK_IFR_AUXADC 23 188238104Sdes#define CLK_IFR_CCIF1_AP 24 189238104Sdes#define CLK_IFR_CCIF1_MD 25 190238104Sdes#define CLK_IFR_AUXADC_MD 26 191238104Sdes#define CLK_IFR_AP_DMA 27 192238104Sdes#define CLK_IFR_DEVICE_APC 28 193238104Sdes#define CLK_IFR_CCIF_AP 29 194238104Sdes#define CLK_IFR_AUDIO 30 195238104Sdes#define CLK_IFR_CCIF_MD 31 196238104Sdes#define CLK_IFR_RG_PWM_FBCLK6 32 197238104Sdes#define CLK_IFR_DISP_PWM 33 198238104Sdes#define CLK_IFR_CLDMA_BCLK 34 199238104Sdes#define CLK_IFR_AUDIO_26M_BCLK 35 200238104Sdes#define CLK_IFR_SPI1 36 201238104Sdes#define CLK_IFR_I2C4 37 202238104Sdes#define CLK_IFR_SPI2 38 203238104Sdes#define CLK_IFR_SPI3 39 204238104Sdes#define CLK_IFR_I2C5 40 205238104Sdes#define CLK_IFR_I2C5_ARBITER 41 206238104Sdes#define CLK_IFR_I2C5_IMM 42 207238104Sdes#define CLK_IFR_I2C1_ARBITER 43 208238104Sdes#define CLK_IFR_I2C1_IMM 44 209238104Sdes#define CLK_IFR_I2C2_ARBITER 45 210238104Sdes#define CLK_IFR_I2C2_IMM 46 211238104Sdes#define CLK_IFR_SPI4 47 212238104Sdes#define CLK_IFR_SPI5 48 213238104Sdes#define CLK_IFR_CQ_DMA 49 214238104Sdes#define CLK_IFR_FAES_FDE 50 215238104Sdes#define CLK_IFR_MSDC0_SELF 51 216238104Sdes#define CLK_IFR_MSDC1_SELF 52 217238104Sdes#define CLK_IFR_I2C6 53 218238104Sdes#define CLK_IFR_AP_MSDC0 54 219238104Sdes#define CLK_IFR_MD_MSDC0 55 220238104Sdes#define CLK_IFR_MSDC0_SRC 56 221238104Sdes#define CLK_IFR_MSDC1_SRC 57 222238104Sdes#define CLK_IFR_AES_TOP0_BCLK 58 223238104Sdes#define CLK_IFR_MCU_PM_BCLK 59 224238104Sdes#define CLK_IFR_CCIF2_AP 60 225238104Sdes#define CLK_IFR_CCIF2_MD 61 226238104Sdes#define CLK_IFR_CCIF3_AP 62 227238104Sdes#define CLK_IFR_CCIF3_MD 63 228238104Sdes#define CLK_IFR_NR_CLK 64 229238104Sdes 230238104Sdes/* AUDIO */ 231238104Sdes#define CLK_AUDIO_AFE 0 232238104Sdes#define CLK_AUDIO_22M 1 233238104Sdes#define CLK_AUDIO_APLL_TUNER 2 234238104Sdes#define CLK_AUDIO_ADC 3 235238104Sdes#define CLK_AUDIO_DAC 4 236238104Sdes#define CLK_AUDIO_DAC_PREDIS 5 237238104Sdes#define CLK_AUDIO_TML 6 238238104Sdes#define CLK_AUDIO_I2S1_BCLK 7 239238104Sdes#define CLK_AUDIO_I2S2_BCLK 8 240238104Sdes#define CLK_AUDIO_I2S3_BCLK 9 241238104Sdes#define CLK_AUDIO_I2S4_BCLK 10 242238104Sdes#define CLK_AUDIO_NR_CLK 11 243238104Sdes 244238104Sdes/* MIPI_RX_ANA_CSI0A */ 245238104Sdes 246238104Sdes#define CLK_MIPI0A_CSR_CSI_EN_0A 0 247238104Sdes#define CLK_MIPI0A_NR_CLK 1 248238104Sdes 249238104Sdes/* MMSYS_CONFIG */ 250238104Sdes 251238104Sdes#define CLK_MM_MDP_RDMA0 0 252238104Sdes#define CLK_MM_MDP_CCORR0 1 253238104Sdes#define CLK_MM_MDP_RSZ0 2 254238104Sdes#define CLK_MM_MDP_RSZ1 3 255238104Sdes#define CLK_MM_MDP_TDSHP0 4 256238104Sdes#define CLK_MM_MDP_WROT0 5 257238104Sdes#define CLK_MM_MDP_WDMA0 6 258238104Sdes#define CLK_MM_DISP_OVL0 7 259238104Sdes#define CLK_MM_DISP_OVL0_2L 8 260238104Sdes#define CLK_MM_DISP_RSZ0 9 261238104Sdes#define CLK_MM_DISP_RDMA0 10 262238104Sdes#define CLK_MM_DISP_WDMA0 11 263238104Sdes#define CLK_MM_DISP_COLOR0 12 264238104Sdes#define CLK_MM_DISP_CCORR0 13 265238104Sdes#define CLK_MM_DISP_AAL0 14 266238104Sdes#define CLK_MM_DISP_GAMMA0 15 267238104Sdes#define CLK_MM_DISP_DITHER0 16 268238104Sdes#define CLK_MM_DSI0 17 269238104Sdes#define CLK_MM_FAKE_ENG 18 270238104Sdes#define CLK_MM_SMI_COMMON 19 271238104Sdes#define CLK_MM_SMI_LARB0 20 272238104Sdes#define CLK_MM_SMI_COMM0 21 273238104Sdes#define CLK_MM_SMI_COMM1 22 274238104Sdes#define CLK_MM_CAM_MDP 23 275238104Sdes#define CLK_MM_SMI_IMG 24 276238104Sdes#define CLK_MM_SMI_CAM 25 277238104Sdes#define CLK_MM_IMG_DL_RELAY 26 278238104Sdes#define CLK_MM_IMG_DL_ASYNC_TOP 27 279238104Sdes#define CLK_MM_DIG_DSI 28 280238104Sdes#define CLK_MM_F26M_HRTWT 29 281238104Sdes#define CLK_MM_NR_CLK 30 282238104Sdes 283238104Sdes/* IMGSYS */ 284238104Sdes 285238104Sdes#define CLK_IMG_LARB2 0 286238104Sdes#define CLK_IMG_DIP 1 287238104Sdes#define CLK_IMG_FDVT 2 288238104Sdes#define CLK_IMG_DPE 3 289238104Sdes#define CLK_IMG_RSC 4 290238104Sdes#define CLK_IMG_NR_CLK 5 291238104Sdes 292238104Sdes/* VENCSYS */ 293238104Sdes 294238104Sdes#define CLK_VENC_SET0_LARB 0 295238104Sdes#define CLK_VENC_SET1_VENC 1 296238104Sdes#define CLK_VENC_SET2_JPGENC 2 297238104Sdes#define CLK_VENC_SET3_VDEC 3 298238104Sdes#define CLK_VENC_NR_CLK 4 299238104Sdes 300238104Sdes/* CAMSYS */ 301238104Sdes 302238104Sdes#define CLK_CAM_LARB3 0 303238104Sdes#define CLK_CAM_DFP_VAD 1 304238104Sdes#define CLK_CAM 2 305238104Sdes#define CLK_CAMTG 3 306238104Sdes#define CLK_CAM_SENINF 4 307238104Sdes#define CLK_CAMSV0 5 308238104Sdes#define CLK_CAMSV1 6 309238104Sdes#define CLK_CAMSV2 7 310238104Sdes#define CLK_CAM_CCU 8 311238104Sdes#define CLK_CAM_NR_CLK 9 312238104Sdes 313238104Sdes#endif /* _DT_BINDINGS_CLK_MT6765_H */ 314238104Sdes